arm-linux-as.1

arm-linux.rar

Usually you do not need to use this \fB\-Wa\fR mechanism, since many compiler
command-line options are automatically passed to the assembler by the compiler.
(You can call the \s-1GNU\s0 compiler driver with the \fB\-v\fR option to see
precisely what options it passes to each compilation pass, including the
assembler.)
.SH "OPTIONS"
.IX Header "OPTIONS"
.IP "\fB\-a[cdhlmns]\fR" 4
.IX Item "-a[cdhlmns]"
Turn on listings, in any of a variety of ways:
.RS 4
.IP "\fB\-ac\fR" 4
.IX Item "-ac"
omit false conditionals
.IP "\fB\-ad\fR" 4
.IX Item "-ad"
omit debugging directives
.IP "\fB\-ah\fR" 4
.IX Item "-ah"
include high-level source
.IP "\fB\-al\fR" 4
.IX Item "-al"
include assembly
.IP "\fB\-am\fR" 4
.IX Item "-am"
include macro expansions
.IP "\fB\-an\fR" 4
.IX Item "-an"
omit forms processing
.IP "\fB\-as\fR" 4
.IX Item "-as"
include symbols
.IP "\fB=file\fR" 4
.IX Item "=file"
set the name of the listing file
.RE
.RS 4
.Sp
You may combine these options; for example, use \fB\-aln\fR for assembly
listing without forms processing.  The \fB=file\fR option, if used, must be
the last one.  By itself, \fB\-a\fR defaults to \fB\-ahls\fR.
.RE
.IP "\fB\-\-alternate\fR" 4
.IX Item "--alternate"
Begin in alternate macro mode, see \f(CW@ref\fR{Altmacro,,\f(CW\*(C`.altmacro\*(C'\fR}.
.IP "\fB\-D\fR" 4
.IX Item "-D"
Ignored.  This option is accepted for script compatibility with calls to
other assemblers.
.IP "\fB\-\-defsym\fR \fIsym\fR\fB=\fR\fIvalue\fR" 4
.IX Item "--defsym sym=value"
Define the symbol \fIsym\fR to be \fIvalue\fR before assembling the input file.
\&\fIvalue\fR must be an integer constant.  As in C, a leading \fB0x\fR
indicates a hexadecimal value, and a leading \fB0\fR indicates an octal value.
.IP "\fB\-f\fR" 4
.IX Item "-f"
``fast''\-\-\-skip whitespace and comment preprocessing (assume source is
compiler output).
.IP "\fB\-g\fR" 4
.IX Item "-g"
.PD 0
.IP "\fB\-\-gen\-debug\fR" 4
.IX Item "--gen-debug"
.PD
Generate debugging information for each assembler source line using whichever
debug format is preferred by the target.  This currently means either \s-1STABS\s0,
\&\s-1ECOFF\s0 or \s-1DWARF2\s0.
.IP "\fB\-\-gstabs\fR" 4
.IX Item "--gstabs"
Generate stabs debugging information for each assembler line.  This
may help debugging assembler code, if the debugger can handle it.
.IP "\fB\-\-gstabs+\fR" 4
.IX Item "--gstabs+"
Generate stabs debugging information for each assembler line, with \s-1GNU\s0
extensions that probably only gdb can handle, and that could make other
debuggers crash or refuse to read your program.  This
may help debugging assembler code.  Currently the only \s-1GNU\s0 extension is
the location of the current working directory at assembling time.
.IP "\fB\-\-gdwarf\-2\fR" 4
.IX Item "--gdwarf-2"
Generate \s-1DWARF2\s0 debugging information for each assembler line.  This
may help debugging assembler code, if the debugger can handle it.  Note\-\-\-this
option is only supported by some targets, not all of them.
.IP "\fB\-\-help\fR" 4
.IX Item "--help"
Print a summary of the command line options and exit.
.IP "\fB\-\-target\-help\fR" 4
.IX Item "--target-help"
Print a summary of all target specific options and exit.
.IP "\fB\-I\fR \fIdir\fR" 4
.IX Item "-I dir"
Add directory \fIdir\fR to the search list for \f(CW\*(C`.include\*(C'\fR directives.
.IP "\fB\-J\fR" 4
.IX Item "-J"
Don't warn about signed overflow.
.IP "\fB\-K\fR" 4
.IX Item "-K"
Issue warnings when difference tables altered for long displacements.
.IP "\fB\-L\fR" 4
.IX Item "-L"
.PD 0
.IP "\fB\-\-keep\-locals\fR" 4
.IX Item "--keep-locals"
.PD
Keep (in the symbol table) local symbols.  On traditional a.out systems
these start with \fBL\fR, but different systems have different local
label prefixes.
.IP "\fB\-\-listing\-lhs\-width=\fR\fInumber\fR" 4
.IX Item "--listing-lhs-width=number"
Set the maximum width, in words, of the output data column for an assembler
listing to \fInumber\fR.
.IP "\fB\-\-listing\-lhs\-width2=\fR\fInumber\fR" 4
.IX Item "--listing-lhs-width2=number"
Set the maximum width, in words, of the output data column for continuation
lines in an assembler listing to \fInumber\fR.
.IP "\fB\-\-listing\-rhs\-width=\fR\fInumber\fR" 4
.IX Item "--listing-rhs-width=number"
Set the maximum width of an input source line, as displayed in a listing, to
\&\fInumber\fR bytes.
.IP "\fB\-\-listing\-cont\-lines=\fR\fInumber\fR" 4
.IX Item "--listing-cont-lines=number"
Set the maximum number of lines printed in a listing for a single line of input
to \fInumber\fR + 1.
.IP "\fB\-o\fR \fIobjfile\fR" 4
.IX Item "-o objfile"
Name the object-file output from \fBas\fR \fIobjfile\fR.
.IP "\fB\-R\fR" 4
.IX Item "-R"
Fold the data section into the text section.
.IP "\fB\-\-statistics\fR" 4
.IX Item "--statistics"
Print the maximum space (in bytes) and total time (in seconds) used by
assembly.
.IP "\fB\-\-strip\-local\-absolute\fR" 4
.IX Item "--strip-local-absolute"
Remove local absolute symbols from the outgoing symbol table.
.IP "\fB\-v\fR" 4
.IX Item "-v"
.PD 0
.IP "\fB\-version\fR" 4
.IX Item "-version"
.PD
Print the \fBas\fR version.
.IP "\fB\-\-version\fR" 4
.IX Item "--version"
Print the \fBas\fR version and exit.
.IP "\fB\-W\fR" 4
.IX Item "-W"
.PD 0
.IP "\fB\-\-no\-warn\fR" 4
.IX Item "--no-warn"
.PD
Suppress warning messages.
.IP "\fB\-\-fatal\-warnings\fR" 4
.IX Item "--fatal-warnings"
Treat warnings as errors.
.IP "\fB\-\-warn\fR" 4
.IX Item "--warn"
Don't suppress warning messages or treat them as errors.
.IP "\fB\-w\fR" 4
.IX Item "-w"
Ignored.
.IP "\fB\-x\fR" 4
.IX Item "-x"
Ignored.
.IP "\fB\-Z\fR" 4
.IX Item "-Z"
Generate an object file even after errors.
.IP "\fB\-\- |\fR \fIfiles\fR \fB...\fR" 4
.IX Item "-- | files ..."
Standard input, or source files to assemble.
.PP
The following options are available when as is configured for
an \s-1ARC\s0 processor.
.IP "\fB\-marc[5|6|7|8]\fR" 4
.IX Item "-marc[5|6|7|8]"
This option selects the core processor variant.
.IP "\fB\-EB | \-EL\fR" 4
.IX Item "-EB | -EL"
Select either big-endian (\-EB) or little-endian (\-EL) output.
.PP
The following options are available when as is configured for the \s-1ARM\s0
processor family.
.IP "\fB\-mcpu=\fR\fIprocessor\fR\fB[+\fR\fIextension\fR\fB...]\fR" 4
.IX Item "-mcpu=processor[+extension...]"
Specify which \s-1ARM\s0 processor variant is the target.
.IP "\fB\-march=\fR\fIarchitecture\fR\fB[+\fR\fIextension\fR\fB...]\fR" 4
.IX Item "-march=architecture[+extension...]"
Specify which \s-1ARM\s0 architecture variant is used by the target.
.IP "\fB\-mfpu=\fR\fIfloating-point-format\fR" 4
.IX Item "-mfpu=floating-point-format"
Select which Floating Point architecture is the target.
.IP "\fB\-mfloat\-abi=\fR\fIabi\fR" 4
.IX Item "-mfloat-abi=abi"
Select which floating point \s-1ABI\s0 is in use.
.IP "\fB\-mthumb\fR" 4
.IX Item "-mthumb"
Enable Thumb only instruction decoding.
.IP "\fB\-mapcs\-32 | \-mapcs\-26 | \-mapcs\-float | \-mapcs\-reentrant\fR" 4
.IX Item "-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant"
Select which procedure calling convention is in use.
.IP "\fB\-EB | \-EL\fR" 4
.IX Item "-EB | -EL"
Select either big-endian (\-EB) or little-endian (\-EL) output.
.IP "\fB\-mthumb\-interwork\fR" 4
.IX Item "-mthumb-interwork"
Specify that the code has been generated with interworking between Thumb and
\&\s-1ARM\s0 code in mind.
.IP "\fB\-k\fR" 4
.IX Item "-k"
Specify that \s-1PIC\s0 code has been generated.
.PP
See the info pages for documentation of the CRIS-specific options.
.PP
The following options are available when as is configured for
a D10V processor.
.IP "\fB\-O\fR" 4
.IX Item "-O"
Optimize output by parallelizing instructions.
.PP
The following options are available when as is configured for a D30V
processor.
.IP "\fB\-O\fR" 4
.IX Item "-O"
Optimize output by parallelizing instructions.
.IP "\fB\-n\fR" 4
.IX Item "-n"
Warn when nops are generated.
.IP "\fB\-N\fR" 4
.IX Item "-N"
Warn when a nop after a 32\-bit multiply instruction is generated.
.PP
The following options are available when as is configured for the
Intel 80960 processor.
.IP "\fB\-ACA | \-ACA_A | \-ACB | \-ACC | \-AKA | \-AKB | \-AKC | \-AMC\fR" 4
.IX Item "-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC"
Specify which variant of the 960 architecture is the target.
.IP "\fB\-b\fR" 4
.IX Item "-b"
Add code to collect statistics about branches taken.
.IP "\fB\-no\-relax\fR" 4
.IX Item "-no-relax"
Do not alter compare-and-branch instructions for long displacements;
error if necessary.
.PP
The following options are available when as is configured for the
Ubicom \s-1IP2K\s0 series.
.IP "\fB\-mip2022ext\fR" 4
.IX Item "-mip2022ext"
Specifies that the extended \s-1IP2022\s0 instructions are allowed.
.IP "\fB\-mip2022\fR" 4
.IX Item "-mip2022"
Restores the default behaviour, which restricts the permitted instructions to
just the basic \s-1IP2022\s0 ones.
.PP
The following options are available when as is configured for the
Renesas M32R (formerly Mitsubishi M32R) series.
.IP "\fB\-\-m32rx\fR" 4
.IX Item "--m32rx"
Specify which processor in the M32R family is the target.  The default
is normally the M32R, but this option changes it to the M32RX.
.IP "\fB\-\-warn\-explicit\-parallel\-conflicts or \-\-Wp\fR" 4
.IX Item "--warn-explicit-parallel-conflicts or --Wp"
Produce warning messages when questionable parallel constructs are
encountered. 
.IP "\fB\-\-no\-warn\-explicit\-parallel\-conflicts or \-\-Wnp\fR" 4
.IX Item "--no-warn-explicit-parallel-conflicts or --Wnp"
Do not produce warning messages when questionable parallel constructs are 
encountered. 
.PP
The following options are available when as is configured for the
Motorola 68000 series.
.IP "\fB\-l\fR" 4
.IX Item "-l"
Shorten references to undefined symbols, to one word instead of two.
.IP "\fB\-m68000 | \-m68008 | \-m68010 | \-m68020 | \-m68030\fR" 4
.IX Item "-m68000 | -m68008 | -m68010 | -m68020 | -m68030"
.PD 0
.IP "\fB| \-m68040 | \-m68060 | \-m68302 | \-m68331 | \-m68332\fR" 4
.IX Item "| -m68040 | -m68060 | -m68302 | -m68331 | -m68332"
.IP "\fB| \-m68333 | \-m68340 | \-mcpu32 | \-m5200\fR" 4
.IX Item "| -m68333 | -m68340 | -mcpu32 | -m5200"
.PD
Specify what processor in the 68000 family is the target.  The default
is normally the 68020, but this can be changed at configuration time.
.IP "\fB\-m68881 | \-m68882 | \-mno\-68881 | \-mno\-68882\fR" 4
.IX Item "-m68881 | -m68882 | -mno-68881 | -mno-68882"
The target machine does (or does not) have a floating-point coprocessor.
The default is to assume a coprocessor for 68020, 68030, and cpu32.  Although
the basic 68000 is not compatible with the 68881, a combination of the
two can be specified, since it's possible to do emulation of the
coprocessor instructions with the main processor.
.IP "\fB\-m68851 | \-mno\-68851\fR" 4
.IX Item "-m68851 | -mno-68851"
The target machine does (or does not) have a memory-management
unit coprocessor.  The default is to assume an \s-1MMU\s0 for 68020 and up.
.PP
For details about the \s-1PDP\-11\s0 machine dependent features options,
see \f(CW@ref\fR{PDP\-11\-Options}.
.IP "\fB\-mpic | \-mno\-pic\fR" 4
.IX Item "-mpic | -mno-pic"
Generate position-independent (or position\-dependent) code.  The
default is \fB\-mpic\fR.
.IP "\fB\-mall\fR" 4
.IX Item "-mall"
.PD 0
.IP "\fB\-mall\-extensions\fR" 4
.IX Item "-mall-extensions"
.PD
Enable all instruction set extensions.  This is the default.
.IP "\fB\-mno\-extensions\fR" 4
.IX Item "-mno-extensions"
Disable all instruction set extensions.
.IP "\fB\-m\fR\fIextension\fR \fB| \-mno\-\fR\fIextension\fR" 4
.IX Item "-mextension | -mno-extension"
Enable (or disable) a particular instruction set extension.
.IP "\fB\-m\fR\fIcpu\fR" 4
.IX Item "-mcpu"
Enable the instruction set extensions supported by a particular \s-1CPU\s0, and
disable all other extensions.
.IP "\fB\-m\fR\fImachine\fR" 4
.IX Item "-mmachine"
Enable the instruction set extensions supported by a particular machine
model, and disable all other extensions.
.PP
The following options are available when as is configured for
a picoJava processor.
.IP "\fB\-mb\fR" 4
.IX Item "-mb"
Generate ``big endian'' format output.
.IP "\fB\-ml\fR" 4