fullwave mains impedance.out.1

开关电源的设计及仿真.rar


**** 03/11/06 18:47:15 ******* PSpice 10.3.0 (Jan 2004) ******* ID# 1111111111 
 ** Profile: "Fullwave mains impedance-Fullwave mains impedance"  [ D:\Christophe\Livres\Spice simus 2\Chapter6\Simulation examples\P


 ****     CIRCUIT DESCRIPTION


******************************************************************************




** Creating circuit file "Fullwave mains impedance.cir" 
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS

*Libraries: 
* Profile Libraries :
* Local Libraries :
* From [PSPICE NETLIST] section of d:\OrCAD_10.3\tools\PSpice\PSpice.ini file:
.lib "D:\Christophe\Livres\Spice simus 2\Chapter2\Simulation examples\PSpice\pwmswitch.lib" 
.lib "D:\Christophe\Livres\Spice simus 2\Chapter2\Simulation examples\PSpice\power456.lib" 
.lib "D:\Christophe\Livres\Spice simus 2\Chapter2\Simulation examples\PSpice\NCP101X.LIB" 
.lib "D:\Christophe\Livres\Spice simus 2\Chapter2\Simulation examples\PSpice\freerun.lib" 
.lib "D:\Christophe\Livres\Spice simus 2\Chapter2\Simulation examples\PSpice\copec.lib" 
.lib "D:\Christophe\Livres\Spice simus 2\Chapter2\Simulation examples\PSpice\application.lib" 
.lib "nom.lib" 

*Analysis directives: 
.TRAN  0 60m 20m 5u SKIPBP 
.OPTIONS ITL4= 20
.OPTIONS RELTOL= 0.01
.PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) 
.INC "..\Fullwave mains impedance.net" 



**** INCLUDING "Fullwave mains impedance.net" ****
* source CHAPTER6
R_R2         N02160 N01691  300  
D_D1         N01687 BULK D1N5406 
C_C2         N01687 N01691  5n  
D_D2         N01691 BULK D1N5406 
D_D3         0 N01687 D1N5406 
D_D4         0 N01691 D1N5406 
V_V1         N01687 N02262  
+SIN 0 120 60 0 0 0
R_R1         N02262 N02160  250m  
C_C1         0 BULK  220u IC=10 
L_L1         N02160 N01691  660u  
G_ABMI1         BULK 0 VALUE { 117/(V(bulk)+10)    }

**** RESUMING "Fullwave mains impedance.cir" ****
.END

**** 03/11/06 18:47:15 ******* PSpice 10.3.0 (Jan 2004) ******* ID# 1111111111 
 ** Profile: "Fullwave mains impedance-Fullwave mains impedance"  [ D:\Christophe\Livres\Spice simus 2\Chapter6\Simulation examples\P


 ****     Diode MODEL PARAMETERS


******************************************************************************




               D1N5406         
          IS   11.500000E-15 
         ISR   40.530000E-06 
         IKF    3.87         
          RS    8.254000E-03 
         CJO  130.400000E-12 
          VJ     .75         
           M     .3758       


ERROR -- Convergence problem in transient analysis at Time =  2.980E-15
         Time step =  2.980E-15, minimum allowable step size =  6.000E-15

  These devices failed to converge:
    G_ABMI1   

ERROR -- Discontinuing simulation due to convergence problem


  Last node voltages tried were:

 NODE   VOLTAGE     NODE   VOLTAGE     NODE   VOLTAGE     NODE   VOLTAGE


( BULK)  -10.0000  (N01687)   -5.0000 (N01691)   -5.0000 (N02160)   -5.0000     

(N02262)   -5.0000 


**** Interrupt ****

 **** Published Runtime Parameters *****************************
                                                               
                                       ABSTOL =      1.0000E-12
                                      C_C1.ic =      1.0000E+01
                                   C_C1.value =      2.2000E-04
                                      C_C2.ic =      0.0000E+00
                                   C_C2.value =      5.0000E-09
                                    D_D1.area =      1.0000E+00
                                      D_D1.ic =      0.0000E+00
                                    D_D2.area =      1.0000E+00
                                      D_D2.ic =      0.0000E+00
                                    D_D3.area =      1.0000E+00
                                      D_D3.ic =      0.0000E+00
                                    D_D4.area =      1.0000E+00
                                      D_D4.ic =      0.0000E+00
                                         GMIN =      1.0000E-12
                                         ITL1 =      1.5000E+02
                                         ITL2 =      2.0000E+01
                                         ITL4 =      2.0000E+01
                                      L_L1.ic =      0.0000E+00
                                 L_L1.lgap.ic =      0.0000E+00
                              L_L1.lgap.value =      0.0000E+00
                                   L_L1.value =      6.6000E-04
                                     R_R1.tc1 =      0.0000E+00
                                     R_R1.tc2 =      0.0000E+00
                                   R_R1.value =      2.5000E-01
                                     R_R2.tc1 =      0.0000E+00
                                     R_R2.tc2 =      0.0000E+00
                                   R_R2.value =      3.0000E+02
                                       RELTOL =      1.0000E-02
                                       RUNFOR =      0.0000E+00
                                         TMAX =      5.0000E-06
                                        TSTOP =      6.0000E-02
                                      V_V1.ac =      0.0000E+00
                                 V_V1.acphase =      0.0000E+00
                                      V_V1.dc =      0.0000E+00
                                        VNTOL =      1.0000E-06
                                               
               

ERROR -- Convergence problem in transient analysis at Time =  2.980E-15
         Time step =  2.980E-15, minimum allowable step size =  6.000E-15

  These devices failed to converge:
    G_ABMI1   

ERROR -- Discontinuing simulation due to convergence problem


  Last node voltages tried were:

 NODE   VOLTAGE     NODE   VOLTAGE     NODE   VOLTAGE     NODE   VOLTAGE


( BULK)  -10.0000  (N01687)   -5.0000 (N01691)   -5.0000 (N02160)   -5.0000     

(N02262)   -5.0000 


**** Interrupt ****