regulator stepped rload w comp.prb

开关电源的设计及仿真.rar

[DISPLAYS]
BEGIN DISPLAY LAST SESSION
ANALYSIS TRANSIENT_ANALYSIS
SYMBOL ALWAYS
TRACECOLORSCHEME NORMAL
BEGIN ANAPLOT 1
ACTIVE
XBASE
BEGIN XAXIS
XAXISUSERNAME 0 (null)
RANGEFLAG AUTO
TYPE LINEAR
UNIT s
BEGIN GRIDS
AUTOMATIC
MAJORNUMBERS
MAJORSTYLE DOTS
MAJORINTERSECTMAJOR
MINORSTYLE DOTS
MINORINTERSECTMAJOR
END GRIDS
END XAXIS
BEGIN YAXIS 1
YAXISSIDE LEFT
ACTIVE
RANGEFLAG AUTO
TYPE LINEAR
UNIT V
BEGIN GRIDS
AUTOMATIC
MAJORNUMBERS
MAJORSTYLE DOTS
MAJORINTERSECTMAJOR
MINORSTYLE DOTS
MINORINTERSECTMAJOR
END GRIDS
BEGIN TRACE v(vout)
MARKERID 8
END TRACE v(vout)
END YAXIS 1
END ANAPLOT 1
END DISPLAY LAST SESSION
BEGIN DISPLAY LAST DISPLAY
ANALYSIS TRANSIENT_ANALYSIS
SYMBOL ALWAYS
TRACECOLORSCHEME NORMAL
BEGIN ANAPLOT 1
ACTIVE
XBASE
BEGIN XAXIS
XAXISUSERNAME 0 (null)
RANGEFLAG AUTO
TYPE LINEAR
UNIT s
BEGIN GRIDS
AUTOMATIC
MAJORNUMBERS
MAJORSTYLE DOTS
MAJORINTERSECTMAJOR
MINORSTYLE DOTS
MINORINTERSECTMAJOR
END GRIDS
END XAXIS
BEGIN YAXIS 1
YAXISSIDE LEFT
ACTIVE
RANGEFLAG NORANGE
TYPE LINEAR
UNIT  
END YAXIS 1
END ANAPLOT 1
END DISPLAY LAST DISPLAY