📄 lcd1602.sim.rpt
字号:
Simulator report for LCD1602
Wed Dec 09 20:59:05 2009
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
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; Table of Contents ;
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1. Legal Notice
2. Simulator Summary
3. Simulator Settings
4. Simulation Waveforms
5. Coverage Summary
6. Complete 1/0-Value Coverage
7. Missing 1-Value Coverage
8. Missing 0-Value Coverage
9. Simulator INI Usage
10. Simulator Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+--------------------------------------------+
; Simulator Summary ;
+-----------------------------+--------------+
; Type ; Value ;
+-----------------------------+--------------+
; Simulation Start Time ; 0 ps ;
; Simulation End Time ; 100.0 us ;
; Simulation Netlist Size ; 3581 nodes ;
; Simulation Coverage ; 69.69 % ;
; Total Number of Transitions ; 501207 ;
; Simulation Breakpoints ; 0 ;
; Family ; MAX II ;
+-----------------------------+--------------+
+-------------------------------------------------------------------------------------------------------------------------------------------+
; Simulator Settings ;
+--------------------------------------------------------------------------------------------+------------------------------+---------------+
; Option ; Setting ; Default Value ;
+--------------------------------------------------------------------------------------------+------------------------------+---------------+
; Simulation mode ; Functional ; Timing ;
; Start time ; 0 ns ; 0 ns ;
; Simulation results format ; CVWF ; ;
; Vector input source ; LCD_CLK_function/LCD1602.vwf ; ;
; Add pins automatically to simulation output waveforms ; On ; On ;
; Check outputs ; Off ; Off ;
; Report simulation coverage ; On ; On ;
; Display complete 1/0 value coverage report ; On ; On ;
; Display missing 1-value coverage report ; On ; On ;
; Display missing 0-value coverage report ; On ; On ;
; Detect setup and hold time violations ; Off ; Off ;
; Detect glitches ; Off ; Off ;
; Disable timing delays in Timing Simulation ; Off ; Off ;
; Generate Signal Activity File ; Off ; Off ;
; Generate VCD File for PowerPlay Power Analyzer ; Off ; Off ;
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