lcd1602.flow.rpt

LCD1602.rar

Flow report for LCD1602
Wed Dec 09 21:18:45 2009
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Flow Summary
  3. Flow Settings
  4. Flow Non-Default Global Settings
  5. Flow Elapsed Time
  6. Flow OS Summary
  7. Flow Log



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+------------------------------------------------------------------------+
; Flow Summary                                                           ;
+-------------------------+----------------------------------------------+
; Flow Status             ; Successful - Wed Dec 09 21:18:45 2009        ;
; Quartus II Version      ; 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition ;
; Revision Name           ; LCD1602                                      ;
; Top-level Entity Name   ; LCD1602                                      ;
; Family                  ; MAX II                                       ;
; Device                  ; EPM240T100C5                                 ;
; Timing Models           ; Final                                        ;
; Met timing requirements ; Yes                                          ;
; Total logic elements    ; 214 / 240 ( 89 % )                           ;
; Total pins              ; 13 / 80 ( 16 % )                             ;
; Total virtual pins      ; 0                                            ;
; UFM blocks              ; 0 / 1 ( 0 % )                                ;
+-------------------------+----------------------------------------------+


+-----------------------------------------+
; Flow Settings                           ;
+-------------------+---------------------+
; Option            ; Setting             ;
+-------------------+---------------------+
; Start date & time ; 12/09/2009 21:18:31 ;
; Main task         ; Compilation         ;
; Revision Name     ; LCD1602             ;
+-------------------+---------------------+


+---------------------------------------------------------------------------------------------------------------------+
; Flow Non-Default Global Settings                                                                                    ;
+---------------------------------------+------------------------------+---------------+-------------+----------------+
; Assignment Name                       ; Value                        ; Default Value ; Entity Name ; Section Id     ;
+---------------------------------------+------------------------------+---------------+-------------+----------------+
; COMPILER_SIGNATURE_ID                 ; 965040678598.126036471104084 ; --            ; --          ; --             ;
; MAX_CORE_JUNCTION_TEMP                ; 85                           ; --            ; --          ; --             ;
; MIN_CORE_JUNCTION_TEMP                ; 0                            ; --            ; --          ; --             ;
; POWER_EXT_SUPPLY_VOLTAGE_TO_REGULATOR ; 3.3V                         ; --            ; --          ; --             ;
; SEARCH_PATH                           ; LCD_CLK_function             ; --            ; --          ; --             ;
; USE_GENERATED_PHYSICAL_CONSTRAINTS    ; Off                          ; --            ; --          ; eda_blast_fpga ;
+---------------------------------------+------------------------------+---------------+-------------+----------------+


+-----------------------------------------------------------------------------------------------------------------------------+
; Flow Elapsed Time                                                                                                           ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Module Name             ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Analysis & Synthesis    ; 00:00:03     ; 1.0                     ; 171 MB              ; 00:00:02                           ;
; Fitter                  ; 00:00:03     ; 1.0                     ; 161 MB              ; 00:00:02                           ;
; Assembler               ; 00:00:02     ; 1.0                     ; 144 MB              ; 00:00:01                           ;
; Classic Timing Analyzer ; 00:00:01     ; 1.0                     ; 118 MB              ; 00:00:01                           ;
; Total                   ; 00:00:09     ; --                      ; --                  ; 00:00:06                           ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+


+---------------------------------------------------------------------------------------+
; Flow OS Summary                                                                       ;
+-------------------------+------------------+------------+------------+----------------+
; Module Name             ; Machine Hostname ; OS Name    ; OS Version ; Processor type ;
+-------------------------+------------------+------------+------------+----------------+
; Analysis & Synthesis    ; PC-200910271952  ; Windows XP ; 5.1        ; i686           ;
; Fitter                  ; PC-200910271952  ; Windows XP ; 5.1        ; i686           ;
; Assembler               ; PC-200910271952  ; Windows XP ; 5.1        ; i686           ;
; Classic Timing Analyzer ; PC-200910271952  ; Windows XP ; 5.1        ; i686           ;
+-------------------------+------------------+------------+------------+----------------+


------------
; Flow Log ;
------------
quartus_map --read_settings_files=on --write_settings_files=off LCD1602 -c LCD1602
quartus_fit --read_settings_files=off --write_settings_files=off LCD1602 -c LCD1602
quartus_asm --read_settings_files=off --write_settings_files=off LCD1602 -c LCD1602
quartus_tan --read_settings_files=off --write_settings_files=off LCD1602 -c LCD1602