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📁 [电子线路模拟仿真软件].TINA.Pro.V.6.Educational-141M.zip
💻 LIB
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.SUBCKT PotMeter A B C PARAMS: Res=1, Percent=100%
R1 A C {Res * Percent}
R2 B C {Res * (1-Percent)}
.ENDS

; ************* Rising edge triggered JK & RS flipflops ***************


.SUBCKT JK_R_STD P C CP J K Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_STD
U_2 JKFF(1) $G_DPWR GND P C INVCP J K Q QN Local IO_STD
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT JK_R_STD_OC P C CP J K Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_STD_OC
U_2 JKFF(1) $G_DPWR GND P C INVCP J K Q QN Local IO_STD_OC
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT JK_R_LS P C CP J K Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_LS
U_2 JKFF(1) $G_DPWR GND P C INVCP J K Q QN Local IO_LS
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT JK_R_LS_OC P C CP J K Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_LS_OC
U_2 JKFF(1) $G_DPWR GND P C INVCP J K Q QN Local IO_LS_OC
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS


; ****************** MasterSlave JK & RS flipflops *****************


.SUBCKT JK_MS_STD P C CP J K Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_STD
U_2 JKFF(1) $G_DPWR GND P C INVCP DJ DK Q QN Local IO_STD
U_3  DFF(2) $G_DPWR GND $G_DPWR $G_DPWR CP J K DJ DK DJN DKN UEFF IO_STD
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT JK_MS_STD_OC P C CP J K Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_STD_OC
U_2 JKFF(1) $G_DPWR GND P C INVCP DJ DK Q QN Local IO_STD_OC
U_3  DFF(2) $G_DPWR GND $G_DPWR $G_DPWR CP J K DJ DK DJN DKN UEFF IO_STD_OC
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT JK_MS_LS P C CP J K Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_LS
U_2 JKFF(1) $G_DPWR GND P C INVCP DJ DK Q QN Local IO_LS
U_3  DFF(2) $G_DPWR GND $G_DPWR $G_DPWR CP J K DJ DK DJN DKN UEFF IO_LS
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT JK_MS_LS_OC P C CP J K Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_LS_OC
U_2 JKFF(1) $G_DPWR GND P C INVCP DJ DK Q QN Local IO_LS_OC
U_3  DFF(2) $G_DPWR GND $G_DPWR $G_DPWR CP J K DJ DK DJN DKN UEFF IO_LS_OC
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS


; ******************* Rising edge triggered D flipflops ****************


.SUBCKT DFF_R_STD P C CP D Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_STD
U_2 JKFF(1) $G_DPWR GND P C INVCP D INVD Q QN Local IO_STD
U_3 INV $G_DPWR GND D INVD Locgate IO_STD
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT DFF_R_STD_OC P C CP D Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_STD_OC
U_2 JKFF(1) $G_DPWR GND P C INVCP D INVD Q QN Local IO_STD_OC
U_3 INV $G_DPWR GND D INVD Locgate IO_STD_OC
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT DFF_R_LS P C CP D Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_LS
U_2 JKFF(1) $G_DPWR GND P C INVCP D INVD Q QN Local IO_LS
U_3 INV $G_DPWR GND D INVD Locgate IO_LS
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT DFF_R_LS_OC P C CP D Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_LS_OC
U_2 JKFF(1) $G_DPWR GND P C INVCP D INVD Q QN Local IO_LS_OC
U_3 INV $G_DPWR GND D INVD Locgate IO_LS_OC
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS


; ******************* Falling edge triggered D flipflops ***************


.SUBCKT DFF_F_STD P C CP D Q QN OPTIONAL:: GND=$G_DGND
+       PARAMS: DLH=0 DHL=0
U_2 JKFF(1) $G_DPWR GND P C CP D INVD Q QN Local IO_STD
U_3 INV $G_DPWR GND D INVD Locgate IO_STD
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT DFF_F_STD_OC P C CP D Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_2 JKFF(1) $G_DPWR GND P C CP D INVD Q QN Local IO_STD_OC
U_3 INV $G_DPWR GND D INVD Locgate IO_STD_OC
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT DFF_F_LS P C CP D Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH=0 DHL=0
U_2 JKFF(1) $G_DPWR GND P C CP D INVD Q QN Local IO_LS
U_3 INV $G_DPWR GND D INVD Locgate IO_LS
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT DFF_F_LS_OC P C CP D Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_2 JKFF(1) $G_DPWR GND P C CP D INVD Q QN Local IO_LS_OC
U_3 INV $G_DPWR GND D INVD Locgate IO_LS_OC
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS


; ******************* Masterslave D flipflops *********************


.SUBCKT DFF_MS_STD P C CP D Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_STD
U_2 JKFF(1) $G_DPWR GND P C INVCP DD DDN Q QN Local IO_STD
U_3  DFF(1) $G_DPWR GND $G_DPWR $G_DPWR CP D DD DDN UEFF IO_STD
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT DFF_MS_STD_OC P C CP D Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_STD_OC
U_2 JKFF(1) $G_DPWR GND P C INVCP DD DDN Q QN Local IO_STD_OC
U_3  DFF(1) $G_DPWR GND $G_DPWR $G_DPWR CP D DD DDN UEFF IO_STD_OC
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT DFF_MS_LS P C CP D Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_LS
U_2 JKFF(1) $G_DPWR GND P C INVCP DD DDN Q QN Local IO_LS
U_3  DFF(1) $G_DPWR GND $G_DPWR $G_DPWR CP D DD DDN UEFF IO_LS
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

.SUBCKT DFF_MS_LS_OC P C CP D Q QN OPTIONAL: GND=$G_DGND
+       PARAMS: DLH = 0 DHL = 0
U_1 INV $G_DPWR GND CP INVCP Locgate IO_LS_OC
U_2 JKFF(1) $G_DPWR GND P C INVCP DD DDN Q QN Local IO_LS_OC
U_3  DFF(1) $G_DPWR GND $G_DPWR $G_DPWR CP D DD DDN UEFF IO_LS_OC
.MODEL Local UEFF ( TPPCQLHTY = {DLH} TPCLKQLHTY = {DLH}
+                   TPPCQHLTY = {DHL} TPCLKQHLTY = {DHL} )
.MODEL Locgate UGATE ()
.ENDS

* UA741 operational amplifier "macromodel" subcircuit
* created using Parts release 4.01 on 07/05/89 at 09:09
* (REV N/A)
* connections:   non-inverting input
*                | inverting input
*                | | positive power supply
*                | | | negative power supply
*                | | | | output
*                | | | | |
.subckt UA741    1 2 3 4 5
*
  c1   11 12 4.664E-12
  c2    6  7 20.00E-12
  dc    5 53 dx
  de   54  5 dx
  dlp  90 91 dx
  dln  92 90 dx
  dp    4  3 dx
  egnd 99  0 poly(2) (3,0) (4,0) 0 .5 .5
  fb    7 99 poly(5) vb vc ve vlp vln 0 10.61E6 -10E6 10E6 10E6 -10E6
  ga	6  0 11 12 137.7E-6
  gcm	0  6 10 99 2.574E-9
  iee  10  4 dc 10.16E-6
  hlim 90  0 vlim 1K
  q1   11  2 13 qx
  q2   12  1 14 qx
  r2    6  9 100.0E3
  rc1   3 11 7.957E3
  rc2   3 12 7.957E3
  re1  13 10 2.740E3
  re2  14 10 2.740E3
  ree  10 99 19.69E6
  ro1   8  5 150
  ro2   7 99 150
  rp    3  4 18.11E3
  vb    9  0 dc 0
  vc	3 53 dc 2.600
  ve   54  4 dc 2.600
  vlim  7  8 dc 0
  vlp  91  0 dc 25
  vln   0 92 dc 25
.model dx D(Is=800.0E-18)
.model qx NPN(Is=800.0E-18 Bf=62.50)
.ends

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