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* LM358 operational amplifier
* "macromodel" subcircuit
*
* connections:
* 1 - non-inverting input
* 2 - inverting input
* 3 - positive power supply
* 4 - negative power supply
* 5 - output
*
.subckt LM358/MC 1 2 3 4 5
*
c1 11 12 3.000E-12
c2 6 7 6.000E-12
cee 10 99 388.6E-15
dc 5 53 dx
de 54 5 dx
dlp 90 91 dx
dln 92 90 dx
dp 4 3 dx
egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5
fb 7 99 poly(5) vb vc ve vlp vln 0 48.23E6
+ -50E6 50E6 50E6 -50E6
ga 6 0 11 12 41.47E-6
gcm 0 6 10 99 414.7E-12
iee 3 10 dc 2.543E-6
hlim 90 0 vlim 1K
q1 11 2 13 qx
q2 12 1 14 qx
r2 6 9 100.0E3
rc1 4 11 24.11E3
rc2 4 12 24.11E3
re1 13 10 3.043E3
re2 14 10 3.043E3
ree 10 99 78.65E6
ro1 8 5 50
ro2 7 99 25
rp 3 4 37.62E3
vb 9 0 dc 0
vc 3 53 dc 1.800
ve 54 4 dc .88
vlim 7 8 dc 0
vlp 91 0 dc 40
vln 0 92 dc 40
desd1 1 3 dx
desd2 2 3 dx
.model dx D(Is=800.0E-18)
.model qx PNP(Is=800.0E-18 Bf=32.03)
.ends
*$
* LM833 operational amplifier
*"macromodel" subcircuit
*
* connections:
* 1 - non-inverting input
* 2 - inverting input
* 3 - positive power supply
* 4 - negative power supply
* 5 - output
*
.subckt LM833/MC 1 2 3 4 5
*
c1 11 12 3.501E-12
c2 6 7 10.00E-12
dc 5 53 dx
de 54 5 dx
dlp 90 91 dx
dln 92 90 dx
dp 4 3 dx
egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5
fb 7 99 poly(5) vb vc ve vlp vln 0 27.96E6
+ -30E6 30E6 30E6 -30E6
ga 6 0 11 12 565.5E-6
gcm 0 6 10 99 5.655E-9
iss 10 4 dc 70.00E-6
hlim 90 0 vlim 1K
j1 11 2 10 jx
j2 12 1 10 jx
r2 6 9 100.0E3
rd1 3 11 1.768E3
rd2 3 12 1.768E3
ro1 8 5 10
ro2 7 99 20
rp 3 4 29.03E3
rss 10 99 2.857E6
vb 9 0 dc 0
vc 3 53 dc .9
ve 54 4 dc .4
vlim 7 8 dc 0
vlp 91 0 dc 30
vln 0 92 dc 30
.model dx D(Is=800.0E-18)
.model jx NJF(Is=150.0E-9 Beta=4.568E-3
+ Vto=-1)
.ends
*$
* OP275 SPICE Macro-model 3/95, Rev. C
* JCB / PMI
* Revision History:
* Added common-mode input capacitance.
* Corrected output short circuit current.
* Corrected common-mode zero location (rev C).
*
* Copyright 1995 by Analog Devices
*
* Refer to "README.DOC" file for License Statement. Use of this model
* indicates your acceptance with the terms and provisions in the License Statement.
*
* Node assignments
* non-inverting input
* | inverting input
* | | positive supply
* | | | negative supply
* | | | | output
* | | | | |
* | | | | |
.SUBCKT OP275/AD 1 2 99 50 34
*
* INPUT STAGE & POLE AT 100 MHZ
*
R3 5 51 2.188
R4 6 51 2.188
CIN 1 2 3.7E-12
CM1 1 98 7.5E-12
CM2 2 98 7.5E-12
C2 5 6 364E-12
I1 97 4 100E-3
IOS 1 2 1E-9
EOS 9 3 POLY(1) 26 28 0.5E-3 1
Q1 5 2 7 QX
Q2 6 9 8 QX
R5 7 4 1.672
R6 8 4 1.672
D1 2 36 DZ
D2 1 36 DZ
EN 3 1 10 0 1
GN1 0 2 13 0 1E-3
GN2 0 1 16 0 1E-3
*
EREF 98 0 28 0 1
EP 97 0 99 0 1
EM 51 0 50 0 1
*
* VOLTAGE NOISE SOURCE
*
DN1 35 10 DEN
DN2 10 11 DEN
VN1 35 0 DC 2
VN2 0 11 DC 2
*
* CURRENT NOISE SOURCE
*
DN3 12 13 DIN
DN4 13 14 DIN
VN3 12 0 DC 2
VN4 0 14 DC 2
*
* CURRENT NOISE SOURCE
*
DN5 15 16 DIN
DN6 16 17 DIN
VN5 15 0 DC 2
VN6 0 17 DC 2
*
* GAIN STAGE & DOMINANT POLE AT 32 HZ
*
R7 18 98 1.09E6
C3 18 98 4.55E-9
G1 98 18 5 6 4.57E-1
V2 97 19 1.35
V3 20 51 1.35
D3 18 19 DX
D4 20 18 DX
*
* POLE/ZERO PAIR AT 1.5MHz/2.7MHz
*
R8 21 98 1E3
R9 21 22 1.25E3
C4 22 98 47.2E-12
G2 98 21 18 28 1E-3
*
* POLE AT 100 MHZ
*
R10 23 98 1
C5 23 98 1.59E-9
G3 98 23 21 28 1
*
* POLE AT 100 MHZ
*
R11 24 98 1
C6 24 98 1.59E-9
G4 98 24 23 28 1
*
* COMMON-MODE GAIN NETWORK WITH ZERO AT 1 kHZ
*
R12 25 26 1E6
C7 25 26 159.15E-12
R13 26 98 1
E2 25 98 POLY(2) 1 98 2 98 0 2.50 2.50
*
* POLE AT 100 MHZ
*
R14 27 98 1
C8 27 98 1.59E-9
G5 98 27 24 28 1
*
* OUTPUT STAGE
*
R15 28 99 100E3
R16 28 50 100E3
C9 28 50 1E-6
ISY 99 50 1.85E-3
R17 29 99 100
R18 29 50 100
L2 29 34 1E-9
G6 32 50 27 29 10E-3
G7 33 50 29 27 10E-3
G8 29 99 99 27 10E-3
G9 50 29 27 50 10E-3
V4 30 29 1.3
V5 29 31 3.8
F1 29 0 V4 1
F2 0 29 V5 1
D5 27 30 DX
D6 31 27 DX
D7 99 32 DX
D8 99 33 DX
D9 50 32 DY
D10 50 33 DY
*
* MODELS USED
*
.MODEL QX PNP(BF=5E5)
.MODEL DX D(IS=1E-12)
.MODEL DY D(IS=1E-15 BV=50)
.MODEL DZ D(IS=1E-15 BV=7.0)
.MODEL DEN D(IS=1E-12 RS=4.35K KF=1.95E-15 AF=1)
.MODEL DIN D(IS=1E-12 RS=268 KF=1.08E-15 AF=1)
.ENDS
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