📄 cs_slc.rpt
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Project Information d:\dk\1508\cs_slc.rpt
MAX+plus II Compiler Report File
Version 10.0 9/14/2000
Compiled: 08/25/2001 11:46:59
Copyright (C) 1988-2000 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera. Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors. No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.
***** Project compilation was successful
** DEVICE SUMMARY **
Chip/ Input Output Bidir Shareable
POF Device Pins Pins Pins LCs Expanders % Utilized
cs_slc EPM7128SLC84-15 33 6 0 21 0 16 %
User Pins: 33 6 0
Project Information d:\dk\1508\cs_slc.rpt
** PROJECT COMPILATION MESSAGES **
Info: Reserved unused input pin 'aaaa' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p37' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p32' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p34' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p33' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'ALE' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p27' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p26' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p25' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p24' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p23' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p22' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p21' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p20' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p17' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p16' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p15' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p14' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p13' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p12' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p11' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p10' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p07' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p06' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p05' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p04' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p03' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p02' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p01' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'p00' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Project Information d:\dk\1508\cs_slc.rpt
** PIN/LOCATION/CHIP ASSIGNMENTS **
Actual
User Assignments
Assignments (if different) Node Name
cs_slc@52 AAA
cs_slc@83 aaaa
cs_slc@50 ALE
cs_slc@1 GCLR
cs_slc@84 G/OE
cs_slc@10 p00
cs_slc@11 p01
cs_slc@12 p02
cs_slc@15 p03
cs_slc@16 p04
cs_slc@17 p05
cs_slc@18 p06
cs_slc@20 p07
cs_slc@21 p10
cs_slc@22 p11
cs_slc@24 p12
cs_slc@25 p13
cs_slc@27 p14
cs_slc@28 p15
cs_slc@29 p16
cs_slc@30 p17
cs_slc@31 p20
cs_slc@33 p21
cs_slc@34 p22
cs_slc@35 p23
cs_slc@36 p24
cs_slc@37 p25
cs_slc@39 p26
cs_slc@40 p27
cs_slc@41 p32
cs_slc@44 p33
cs_slc@45 p34
cs_slc@46 p35
cs_slc@48 p36
cs_slc@49 p37
cs_slc@79 Q0
cs_slc@77 Q1
cs_slc@76 Q2
cs_slc@75 Q3
Project Information d:\dk\1508\cs_slc.rpt
** FILE HIERARCHY **
|lpm_counter:1|
|lpm_counter:1|lpm_add_sub:add_sub|
|lpm_counter:1|lpm_add_sub:add_sub|addcore:adder|
|lpm_counter:1|lpm_add_sub:add_sub|addcore:adder|addcore:adder0|
|lpm_counter:1|lpm_add_sub:add_sub|altshift:result_ext_latency_ffs|
|lpm_counter:1|lpm_add_sub:add_sub|altshift:carry_ext_latency_ffs|
|lpm_counter:1|lpm_add_sub:add_sub|altshift:oflow_ext_latency_ffs|
|lpm_counter:1|lpm_constant:scdw|
|lpm_counter:4|
|lpm_counter:4|lpm_add_sub:add_sub|
|lpm_counter:4|lpm_add_sub:add_sub|addcore:adder|
|lpm_counter:4|lpm_add_sub:add_sub|addcore:adder|addcore:adder3|
|lpm_counter:4|lpm_add_sub:add_sub|addcore:adder|addcore:adder2|
|lpm_counter:4|lpm_add_sub:add_sub|addcore:adder|addcore:adder1|
|lpm_counter:4|lpm_add_sub:add_sub|addcore:adder|addcore:adder0|
|lpm_counter:4|lpm_add_sub:add_sub|altshift:result_ext_latency_ffs|
|lpm_counter:4|lpm_add_sub:add_sub|altshift:carry_ext_latency_ffs|
|lpm_counter:4|lpm_add_sub:add_sub|altshift:oflow_ext_latency_ffs|
|lpm_counter:4|lpm_constant:scdw|
Device-Specific Information: d:\dk\1508\cs_slc.rpt
cs_slc
***** Logic for device 'cs_slc' compiled without errors.
Device: EPM7128SLC84-15
Device Options:
Turbo Bit = ON
Security Bit = OFF
Enable JTAG Support = ON
User Code = ffff
MultiVolt I/O = OFF
R R R R R R R
E E E E E E E
S S S S S V S S
E E E E E C E E V
R R R R R C G G a R R C
p p V V G V V V I G C / a G V V C
0 0 E E N E E E N N L O a N E E Q I Q Q Q
1 0 D D D D D D T D R E a D D D 0 O 1 2 3
-----------------------------------------------------------------_
/ 11 10 9 8 7 6 5 4 3 2 1 84 83 82 81 80 79 78 77 76 75 |
p02 | 12 74 | RESERVED
VCCIO | 13 73 | RESERVED
#TDI | 14 72 | GND
p03 | 15 71 | #TDO
p04 | 16 70 | RESERVED
p05 | 17 69 | RESERVED
p06 | 18 68 | RESERVED
GND | 19 67 | RESERVED
p07 | 20 66 | VCCIO
p10 | 21 65 | RESERVED
p11 | 22 EPM7128SLC84-15 64 | RESERVED
#TMS | 23 63 | RESERVED
p12 | 24 62 | #TCK
p13 | 25 61 | RESERVED
VCCIO | 26 60 | RESERVED
p14 | 27 59 | GND
p15 | 28 58 | RESERVED
p16 | 29 57 | RESERVED
p17 | 30 56 | RESERVED
p20 | 31 55 | RESERVED
GND | 32 54 | RESERVED
|_ 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 _|
------------------------------------------------------------------
p p p p p V p p p G V p p p G p p A R A V
2 2 2 2 2 C 2 2 3 N C 3 3 3 N 3 3 L E A C
1 2 3 4 5 C 6 7 2 D C 3 4 5 D 6 7 E S A C
I I E I
O N R O
T V
E
D
N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.
^ = Dedicated configuration pin.
+ = Reserved configuration pin, which is tri-stated during user mode.
* = Reserved configuration pin, which drives out in user mode.
PDn = Power Down pin.
@ = Special-purpose pin.
# = JTAG Boundary-Scan Testing/In-System Programming or Configuration Pin. The JTAG inputs TMS and TDI should be tied to VCC and TCK should be tied to GND when not in use.
& = JTAG pin used for I/O. When used as user I/O, JTAG pins must be kept stable before and during configuration. JTAG pin stability prevents accidental loading of JTAG instructions.
Device-Specific Information: d:\dk\1508\cs_slc.rpt
cs_slc
** RESOURCE USAGE **
Shareable External
Logic Array Block Logic Cells I/O Pins Expanders Interconnect
A: LC1 - LC16 0/16( 0%) 3/ 8( 37%) 0/16( 0%) 0/36( 0%)
B: LC17 - LC32 0/16( 0%) 8/ 8(100%) 0/16( 0%) 0/36( 0%)
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