📄 devhelp.txt
字号:
%%
%F161
F161 Architecture
Mnemonic: F161 Mnemonic: DIP
Pin Count: 24 Total Product Terms: 48
Extensions:
_____________________________________________________________
Manufacturer Device Name
------------ -----------
PHILIPS 82S161
PHILIPS PLS161
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): GND(s):
Input Only:
Output Only:
Input/Output:
%%
%F162
F162 Architecture
Mnemonic: F162 Mnemonic: DIP
Pin Count: 24 Total Product Terms: 5
Extensions:
_____________________________________________________________
Manufacturer Device Name
------------ -----------
PHILIPS 82S162
PHILIPS PLS162
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): GND(s):
Input Only:
Output Only:
Input/Output:
%%
%F163
F163 Architecture
Mnemonic: F163 Mnemonic: DIP
Pin Count: 24 Total Product Terms: 9
Extensions:
_____________________________________________________________
Manufacturer Device Name
------------ -----------
PHILIPS 82S163
PHILIPS PLS163
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): GND(s):
Input Only:
Output Only:
Input/Output:
%%
%F167
F167 Architecture
Mnemonic: F167 Mnemonic: DIP
Pin Count: 24 Total Product Terms: 48
Extensions: S R CA OE AP
_____________________________________________________________
Manufacturer Device Name
------------ -----------
AMD/MMI PLS167A/B
PHILIPS 82S167
PHILIPS 82S167A
PHILIPS PLS167
PHILIPS PLS167A
TI N82S167A
TI TIB82S167B
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): GND(s):
Input Only:
Output Only:
Input/Output:
%%
%F167lcc
F167lcc Architecture
Mnemonic: F167lcc Mnemonic: PLCC
Pin Count: 28 Total Product Terms: 48
Extensions: S R CA OE AP
_____________________________________________________________
Manufacturer Device Name
------------ -----------
AMD/MMI PLS167A/B
PHILIPS 82S167
PHILIPS 82S167A
PHILIPS PLS167
PHILIPS PLS167A
TI N82S167A
TI TIB82S167B
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): GND(s):
Input Only:
Output Only:
Input/Output:
%%
%F168
F168 Architecture
Mnemonic: F168 Mnemonic: DIP
Pin Count: 24 Total Product Terms: 48
Extensions: S R CA OE AP
_____________________________________________________________
Manufacturer Device Name
------------ -----------
AMD/MMI PLS168A/B
PHILIPS 82S168
PHILIPS PLS168
PHILIPS PLS168A
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): GND(s):
Input Only:
Output Only:
Input/Output:
%%
%F168lcc
F168lcc Architecture
Mnemonic: F168lcc Mnemonic: PLCC
Pin Count: 28 Total Product Terms: 48
Extensions: S R CA OE AP
_____________________________________________________________
Manufacturer Device Name
------------ -----------
AMD/MMI PLS168A/B
PHILIPS 82S168
PHILIPS PLS168
PHILIPS PLS168A
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): GND(s):
Input Only:
Output Only:
Input/Output:
%%
%F16V8
F16V8 Architecture
Mnemonic: F16V8 Mnemonic: DIP
Pin Count: 20 Total Product Terms: 72
Extensions: OE D
_____________________________________________________________
Manufacturer Device Name
------------ -----------
PHILIPS PLC16V8
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): GND(s):
Input Only:
Output Only:
Input/Output:
_____________________________________________________________
Device Notes:
1. This device emulates two different PAL architectures
with their flexible output macro configuration. When
this device mnemonic is used, the device parameters for
the proper sub-mode are automatically selected according
to the following:
A. Registered Mode Mnemonic: F16V8D
Specifying any output pin as registered invokes the
registered mode (D). Specifying any output enable term
for a nonregistered pin invokes the registered mode (D).
B. Small Mode Mnemonic: F16V8S
If neither of the above conditions are met, the device
type defaults to the small mode (S).
2. Either the automatic selection mechanism or the device
mnemonic for the specific sub-mode may be used.
%%
%F173
F173 Architecture
Mnemonic: F173 Mnemonic: DIP
Pin Count: 24 Total Product Terms: 42
Extensions: OE
_____________________________________________________________
Manufacturer Device Name
------------ -----------
GOULD PEEL173
ICT PEEL173
PHILIPS 82S173
PHILIPS PLS173
PHILIPS PLUS173B/D
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): 24 GND(s): 12
Input Only: 1 2 3 4 5 6 7 8 9 10 11 13
Output Only:
Input/Output: 14 15 16 17 18 19 20 21 22 23
%%
%F173lcc
F173lcc Architecture
Mnemonic: F173lcc Mnemonic: PLCC
Pin Count: 28 Total Product Terms: 42
Extensions: OE
_____________________________________________________________
Manufacturer Device Name
------------ -----------
GOULD PEEL173
ICT PEEL173
PHILIPS 82S173
PHILIPS PLS173
PHILIPS PLUS173B/D
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): GND(s):
Input Only:
Output Only:
Input/Output:
%%
%F179
F179 Architecture
Mnemonic: F179 Mnemonic: DIP
Pin Count: 24 Total Product Terms: 43
Extensions: OE D AR AP J K CA
_____________________________________________________________
Manufacturer Device Name
------------ -----------
PHILIPS 82S179
PHILIPS PLS179
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): GND(s):
Input Only:
Output Only:
Input/Output:
_____________________________________________________________
Device Notes:
1. Registers may be used as either D-type or JK-type, but
not both (no dynamic conversion).
2. The output enable buffer for all registers is always
controlled by pin 13.
3. The load control term (for loading registers from the
output pins) is not supported.
4. The product term that drives the register control
buffer is fixed and may not be accessed to drive the
complement array.
%%
%F179
F179 Architecture
Mnemonic: F179 Mnemonic: PLCC
Pin Count: 28 Total Product Terms: 43
Extensions: OE D AR AP J K CA
_____________________________________________________________
Manufacturer Device Name
------------ -----------
PHILIPS 82S179
PHILIPS PLS179
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): GND(s):
Input Only:
Output Only:
Input/Output:
_____________________________________________________________
Device Notes:
1. Registers may be used as either D-type or JK-type, but
not both (no dynamic conversion).
2. The output enable buffer for all registers is always
controlled by pin 13.
3. The load control term (for loading registers from the
output pins) is not supported.
4. The product term that drives the register control
buffer is fixed and may not be accessed to drive the
complement array.
%%
%F18V8Z
F18V8Z Architecture
Mnemonic: F18V8Z Mnemonic: DIP
Pin Count: 20 Total Product Terms: 72
Extensions: OE D AR SP
_____________________________________________________________
Manufacturer Device Name
------------ -----------
ATMEL AT18V8Z
PHILIPS PLC18V8Z
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): GND(s):
Input Only:
Output Only:
Input/Output:
_____________________________________________________________
Device Notes:
1. This device emulates two different PAL architectures
with their flexible output macro configuration. When
this device mnemonic is used, the device parameters for
the proper sub-mode are automatically selected according
to the following:
A. Registered Mode Mnemonic: F18V8ZD
Specifying any output pin as registered invokes the
registered mode (D). Specifying any output enable term
for a nonregistered pin invokes the registered mode (D).
B. Small Mode Mnemonic: F18V8ZS
If neither of the above conditions are met, the device
type defaults to the small mode (S).
2. Either the automatic selection mechanism or the device
mnemonic for the specific sub-mode may be used.
%%
%F20V8
F20V8 Architecture
Mnemonic: F20V8 Mnemonic: DIP
Pin Count: 24 Total Product Terms: 72
Extensions: OE D
_____________________________________________________________
Manufacturer Device Name
------------ -----------
PHILIPS PLC20V8
_____________________________________________________________
Clock Pin(s): Common OE(s):
VCC(s): GND(s):
Input Only:
Output Only:
Input/Output:
_____________________________________________________________
Device Notes:
1. This device emulates two different PAL architectures
with their flexible output macro configuration. When
this device mnemonic is used, the device parameters for
the proper sub-mode are automatically selected according
to the following:
A. Registered Mode Mnemonic: F20V8D
Specifying any output pin as registered invokes the
registered mode (D). Specifying any output enable term
for a nonregistered pin invokes the registered mode (D).
B. Small Mode Mnemonic: F20V8S
If neither of the above conditions are met, the device
type defaults to the small mode (S).
2. Either the automatic selection mechanism or the device
mnemonic for the specific sub-mode may be used.
%%
%F253
F253 Architecture
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