pld.opt

Protel99-SE-软件.zip

" Device Optimization Options (V3.15)
" ----------------------------------
$ C16L8 20 0
$ P16L8 20 0
! QBAR_REG_FB ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_ACTIVE_LOW ;
" ---------------------
$ C16R6 20 0
$ P16R6 20 0
! QBAR_REG_FB ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_ACTIVE_LOW ;
" ---------------------
$ C16R4 20 0
$ P16R4 20 0
! QBAR_REG_FB ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_ACTIVE_LOW ;
" ---------------------
$ C16R8 20 0
$ P16R8 20 0
! QBAR_REG_FB ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_ACTIVE_LOW ;
" ---------------------
$ C18G8 20 0
$ P18G8 20 0
! QBAR_REG_FB ;
! -QFB&PolarityAfterReg ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_BEST ;
" ---------------------
$ C20G10 24 0
$ C20G10C 24 0
$ P20G10 24 0
! QBAR_REG_FB ;
! -QFB&PolarityAfterReg ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_BEST ;
" ---------------------
$ C20RA10 24 0
$ P20RA10 24 0
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_NO_CHANGE ;
! REG_WITHOUT_QFB 10   14 15 16 17 18 19 20 21 22 23 ;
" ---------------------
$ C22V10 24 2
$ P22V10 24 2
! QBAR_REG_FB ;
! -QFB&PolarityAfterReg ;
! PST_RST=SPAR ;
! BLOCK_PST_RST 1 10 10 ;
! OUTPUT OPT_BEST ;
! MIN_XOR_PT_COUNT 0 ;
! NO_PinNodeWire ;
" ---------------------
$ C22VP10 24 2
$ P22VP10 24 2
! QBAR_REG_FB ;
! -QFB&PolarityAfterReg ;
! PST_RST=SPAR ;
! BLOCK_PST_RST 1 10 10 ;
! OUTPUT OPT_BEST ;
! MIN_XOR_PT_COUNT 0 ;
! NO_PinNodeWire ;
" ---------------------
$ C610 24 0
$ CY7B326 24 0
$ E0600 24 0
! ACTIVE_HIGH_OUTPUTS ;
! T_REGISTER ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_BEST ;
" ---------------------
$ C16V8  20 0
$ C16V8A 20 0
$ C16V8B 20 0
$ C16V8C 20 0
$ C16V8D 20 0
$ C16V8E 20 0
! QBAR_REG_FB ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_BEST ;
" ---------------------
$ C333X 28 2
$ CY7B333X 28 2
$ P333X 28 2
! +QFB&PolarityAfterReg ;
! ACTIVE_HIGH_OUTPUTS ;
! T_REGISTER ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_NO_CHANGE ;
" ---------------------
$ C333 28 2
$ CY7B333 28 2
$ P333 28 2
$ C333B 28 2
$ CY7B333B 28 2
$ P333B 28 2
! ACTIVE_HIGH_OUTPUTS ;
! T_REGISTER ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_BEST ;
" ---------------------
$ C336 28 0
$ CY7B336 28 0
$ P336 28 0
! USE_INPUT_REGISTERS ;
! IREG_SUPPORT_PRESET+RESET ;
! KEEP_LATCHES ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_ACTIVE_LOW ;
" ---------------------
$ C337 28 0
$ CY7B337 28 0
$ P337 28 0
! USE_INPUT_REGISTERS ;
! IREG_SUPPORT_PRESET+RESET ;
! KEEP_LATCHES ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_ACTIVE_LOW ;
" ---------------------
$ C338 28 0
$ CY7B338 28 0
$ P338 28 0
! KEEP_LATCHES ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_ACTIVE_LOW ;
" ---------------------
$ C339 28 0
$ CY7B339 28 0
$ P339 28 0
! KEEP_LATCHES ;
! MIN_XOR_PT_COUNT 0 ;
! OUTPUT OPT_ACTIVE_LOW ;
" ---------------------
$ C330 28 12
$ CY7C330 28 12
$ P330 28 12
! QBAR_REG_FB ;
! USE_INPUT_REGISTERS ;
! IREG_SUPPORT_PRESET+RESET ;
! KEEP_LATCHES ;
! MIN_XOR_PT_COUNT 1 ;
! OUTPUT OPT_BEST ;
! XOR OPT_NO_CHANGE ;
! SOFT_NoCombinatorial ;
" ---------------------
$ C331 28 6
$ CY7C331 28 6
$ P331 28 6
! SWOP_PST_RST ;
! QBAR_REG_FB ;
! USE_INPUT_REGISTERS ;
! IREG_SUPPORT_PRESET+RESET ;
! USE_FEEDBACK_REGISTERS ;
! KEEP_LATCHES ;
! MIN_XOR_PT_COUNT 1 ;
! OUTPUT OPT_BEST ;
! XOR OPT_NO_CHANGE ;
" ---------------------
$ C332 28 0
$ CY7C332 28 0
$ P332 28 0
! USE_INPUT_REGISTERS ;
! IREG_SUPPORT_PRESET+RESET ;
! KEEP_LATCHES ;
! MIN_XOR_PT_COUNT 1 ;
! OUTPUT OPT_BEST ;
! XOR OPT_NO_CHANGE ;
" ---------------------
$ C335 28 12
$ CY7C335 28 12
$ P335 28 12
! SWOP_PST_RST ;
! QBAR_REG_FB ;
! USE_INPUT_REGISTERS ;
! IREG_SUPPORT_PRESET+RESET ;
! KEEP_LATCHES ;
! MIN_XOR_PT_COUNT 1 ;
! OUTPUT OPT_BEST ;
! XOR OPT_NO_CHANGE ;
" ---------------------MAX devices
$ C341    84 812
$ CY7C341 84 812
! SWAP_APAR_ON_AL ;
! DEFAULT_PACKAGE CY7C341B-15HC ;
! USE_EXPANDERS 3 ;
! SIMPLE_SUM_SPLIT 32 ;
! BUILD_XOR ;
! FACTOR_EQN ;
! KEEP_LATCHES ;
! ACTIVE_HIGH_OUTPUTS ;
! MIN_XOR_PT_COUNT 1 ;
! MAX_XOR_PT_COUNT 3 ;
! OUTPUT OPT_BEST ;
! XOR OPT_ACTIVE_HIGH ;
! AP OPT_ACTIVE_LOW ;
! AR OPT_ACTIVE_LOW ;
! CLK OPT_ACTIVE_HIGH ;
! OE OPT_ACTIVE_HIGH ;
! NO_PinNodeWire ;
! INTERNAL_CMB_FB ;
" ---------------------MAX devices
$ C342    68 532
$ CY7C342 68 532
! SWAP_APAR_ON_AL ;
! DEFAULT_PACKAGE CY7C342B-15HC/HI ;
! USE_EXPANDERS 3 ;
! SIMPLE_SUM_SPLIT 32 ;
! BUILD_XOR ;
! FACTOR_EQN ;
! KEEP_LATCHES ;
! ACTIVE_HIGH_OUTPUTS ;
! MIN_XOR_PT_COUNT 1 ;
! MAX_XOR_PT_COUNT 3 ;
! OUTPUT OPT_BEST ;
! XOR OPT_ACTIVE_HIGH ;
! AP OPT_ACTIVE_LOW ;
! AR OPT_ACTIVE_LOW ;
! CLK OPT_ACTIVE_HIGH ;
! OE OPT_ACTIVE_HIGH ;
! NO_PinNodeWire ;
! INTERNAL_CMB_FB ;
" ---------------------MAX devices
$ C343    44 264
$ CY7C343 44 264
! SWAP_APAR_ON_AL ;
! DEFAULT_PACKAGE CY7C343-20HC/HI ;
! USE_EXPANDERS 3 ;
! SIMPLE_SUM_SPLIT 32 ;
! BUILD_XOR ;
! FACTOR_EQN ;
! KEEP_LATCHES ;
! ACTIVE_HIGH_OUTPUTS ;
! MIN_XOR_PT_COUNT 1 ;
! MAX_XOR_PT_COUNT 3 ;
! OUTPUT OPT_BEST ;
! XOR OPT_ACTIVE_HIGH ;
! AP OPT_ACTIVE_LOW ;
! AR OPT_ACTIVE_LOW ;
! CLK OPT_ACTIVE_HIGH ;
! OE OPT_ACTIVE_HIGH ;
! NO_PinNodeWire ;
! INTERNAL_CMB_FB ;
" ---------------------MAX devices
$ C344     28 80
$ CY7C344  28 80
$ P5032    28 80
$ C344A    28 80
$ CY7C344A 28 80
$ P5032A   28 80
$ C344S    28 80
$ CY7C344S 28 80
$ P5032S   28 80
! SWAP_APAR_ON_AL ;
! USE_EXPANDERS 3 ;
! BUILD_XOR ;
! FACTOR_EQN ;
! KEEP_LATCHES ;
! ACTIVE_HIGH_OUTPUTS ;
! MIN_XOR_PT_COUNT 1 ;
! MAX_XOR_PT_COUNT 3 ;
! OUTPUT OPT_BEST ;
! XOR OPT_ACTIVE_HIGH ;
! AP OPT_ACTIVE_LOW ;
! AR OPT_ACTIVE_LOW ;
! CLK OPT_ACTIVE_HIGH ;
! OE OPT_ACTIVE_HIGH ;
! NO_PinNodeWire ;
! INTERNAL_CMB_FB ;
" ---------------------MAX devices
$ C346         84  536
$ CY7C346      84  536
$ C346B        84  536
$ CY7C346B     84  536
$ C346H     100 520
$ CY7C346H  100 520
$ C346BH    100 520
$ CY7C346BH 100 520
$ C346-100     100 520
$ CY7C346-100  100 520
$ C346B-100    100 520
$ CY7C346B-100 100 520
! SWAP_APAR_ON_AL ;
! DEFAULT_PACKAGE CY7C346B-15RC/RI ;
! USE_EXPANDERS 3 ;
! SIMPLE_SUM_SPLIT 32 ;
! BUILD_XOR ;
! FACTOR_EQN ;
! KEEP_LATCHES ;
! ACTIVE_HIGH_OUTPUTS ;
! MIN_XOR_PT_COUNT 1 ;
! MAX_XOR_PT_COUNT 3 ;
! OUTPUT OPT_BEST ;
! XOR OPT_ACTIVE_HIGH ;
! AP OPT_ACTIVE_LOW ;
! AR OPT_ACTIVE_LOW ;
! CLK OPT_ACTIVE_HIGH ;
! OE OPT_ACTIVE_HIGH ;
! NO_PinNodeWire ;
! PACKAGE CY7C346B-15RC/RI C346H ;
! PACKAGE CY7C346B-20RC/RI C346H ;
! PACKAGE CY7C346B-20RMB   C346H ;
! PACKAGE CY7C346B-25RC/RI C346H ;
! PACKAGE CY7C346B-25RMB   C346H ;
! PACKAGE CY7C346B-30RC/RI C346H ;
! PACKAGE CY7C346B-30RMB   C346H ;
! PACKAGE CY7C346B-35RC/RI C346H ;
! PACKAGE CY7C346B-35RMB   C346H ;
! INTERNAL_CMB_FB ;
" ---------------------Registered PROM's
$ C258 28 10
$ CY7C258 28 10
$ P258 28 10
! PROM_Device ;
! MIN_XOR_PT_COUNT 0 ;
! USE_INPUT_REGISTERS ;
! OUTPUT OPT_ACTIVE_HIGH ;
! REG_WITHOUT_QFB 5   18 19 23 24 25 ;
! SOFT_NoCombinatorial ;
" ---
$ C259 44 2
$ CY7C259 44 2
$ P259 44 2
! PROM_Device ;
! MIN_XOR_PT_COUNT 0 ;
! USE_INPUT_REGISTERS ;
! OUTPUT OPT_ACTIVE_HIGH ;
! REG_WITHOUT_QFB 5   38 39 40 41 42 ;
! SOFT_NoCombinatorial ;
" ---------------------C37x
$ C371 44 286
$ CY7C371 44 286
! DEFAULT_PACKAGE CY7C371-143JC ;
! SWOP_PST_RST ;
! BLOCK_PST_RST 2 16 16 ;
! SIMPLE_SUM_SPLIT 16 ;
! +QFB&PolarityAfterReg ;
! USE_INPUT_REGISTERS ;
! KEEP_LATCHES ;
! LATCH_TRANSPARENT_WHEN 1 ;
! T_REGISTER ;
! MIN_XOR_PT_COUNT 0 ;
! ACTIVE_HIGH_OUTPUTS ;
! OUTPUT OPT_BEST ;
! AP OPT_BEST ;
! AR OPT_BEST ;
! INTERNAL_CMB_FB ;
" ---
$ C372 44 250
$ CY7C372 44 250
! DEFAULT_PACKAGE CY7C372-125JC ;
! SWOP_PST_RST ;
! BLOCK_PST_RST 4 16 8 ;
! SIMPLE_SUM_SPLIT 16 ;
! +QFB&PolarityAfterReg ;
! USE_INPUT_REGISTERS ;
" ! IREG_SUPPORT_PRESET+RESET ;
! KEEP_LATCHES ;
! LATCH_TRANSPARENT_WHEN 1 ;
! T_REGISTER ;
! MIN_XOR_PT_COUNT 0 ;
! ACTIVE_HIGH_OUTPUTS ;
! OUTPUT OPT_BEST ;
! AP OPT_BEST ;
! AR OPT_BEST ;
! INTERNAL_CMB_FB ;
" ---
$ C373 84 186
$ CY7C373 84 186
! DEFAULT_PACKAGE CY7C373-125JC ;
! SWOP_PST_RST ;
! BLOCK_PST_RST 4 16 8 ;
! SIMPLE_SUM_SPLIT 16 ;
! +QFB&PolarityAfterReg ;
! USE_INPUT_REGISTERS ;
! IREG_SUPPORT_PRESET+RESET ;
! KEEP_LATCHES ;
! LATCH_TRANSPARENT_WHEN 1 ;
! T_REGISTER ;
! MIN_XOR_PT_COUNT 0 ;
! ACTIVE_HIGH_OUTPUTS ;
! OUTPUT OPT_BEST ;
! AP OPT_BEST ;
! AR OPT_BEST ;
! INTERNAL_CMB_FB ;
" ---
$ C374 84 494
$ CY7C374 84 494
! DEFAULT_PACKAGE CY7C374-100JC ;
! SWOP_PST_RST ;
! BLOCK_PST_RST 8 16 8 ;
! SIMPLE_SUM_SPLIT 16 ;
! +QFB&PolarityAfterReg ;
! USE_INPUT_REGISTERS ;
" ! IREG_SUPPORT_PRESET+RESET ;
! KEEP_LATCHES ;
! LATCH_TRANSPARENT_WHEN 1 ;
! T_REGISTER ;
! MIN_XOR_PT_COUNT 0 ;
! ACTIVE_HIGH_OUTPUTS ;
! OUTPUT OPT_BEST ;
! AP OPT_BEST ;
! AR OPT_BEST ;
! INTERNAL_CMB_FB ;
" ---
$ C375 160 366
$ CY7C375 160 366
! DEFAULT_PACKAGE CY7C375-100AC ;
! SWOP_PST_RST ;
! BLOCK_PST_RST 8 16 16 ;
! SIMPLE_SUM_SPLIT 16 ;
! +QFB&PolarityAfterReg ;
! USE_INPUT_REGISTERS ;
! KEEP_LATCHES ;
! LATCH_TRANSPARENT_WHEN 1 ;
! T_REGISTER ;
! MIN_XOR_PT_COUNT 0 ;
! ACTIVE_HIGH_OUTPUTS ;
! OUTPUT OPT_BEST ;
! AP OPT_BEST ;
! AR OPT_BEST ;
! INTERNAL_CMB_FB ;
$ !EOF!