c37x.drc

Protel99-SE-软件.zip

! NODE [ 277 ] OUT [ OE : PT [ 1 ] : BANK [ 13 ] ] ;
! NODE [ 278 ] OUT [ OE : PT [ 1 ] : BANK [ 14 ] ] ;
! NODE [ 279 ] OUT [ AR : PT [ 1 : PRG ] : BANK [ 6 ] ] ;
! NODE [ 280 ] OUT [ AP : PT [ 1 : PRG ] : BANK [ 5 ] ] ;
! NODE [ 281 ] OUT [ OE : PT [ 1 ] : BANK [ 13 ] ] ;
! NODE [ 282 ] OUT [ OE : PT [ 1 ] : BANK [ 14 ] ] ;

! NODE [ 283 ] OUT [ OE : PT [ 1 ] : BANK [ 15 ] ] ;
! NODE [ 284 ] OUT [ OE : PT [ 1 ] : BANK [ 16 ] ] ;
! NODE [ 285 ] OUT [ AR : PT [ 1 : PRG ] : BANK [ 8 ] ] ;
! NODE [ 286 ] OUT [ AP : PT [ 1 : PRG ] : BANK [ 7 ] ] ;
! NODE [ 287 ] OUT [ OE : PT [ 1 ] : BANK [ 15 ] ] ;
! NODE [ 288 ] OUT [ OE : PT [ 1 ] : BANK [ 16 ] ] ;

! NODE [ 289 ] OUT [ COMB : PIN [ 10 : FIX ] : FB [ PIN ]
  ,   D : PIN [ 10 : FIX ] : FB [ Q ]
  , CLK : PIN [ 13,-13,35,-35 ] ] ;
! NODE [ 290 ] OUT [ COMB : PIN [ 11 : FIX ] : FB [ PIN ]
  ,   D : PIN [ 11 : FIX ] : FB [ Q ]
  , CLK : PIN [ 13,-13,35,-35 ] ] ;
! NODE [ 291 ] OUT [ COMB : PIN [ 13 : FIX ] : FB [ PIN ]
  ,   D : PIN [ 13 : FIX ] : FB [ Q ]
  , CLK : PIN [ 35,-35 ] ] ;
! NODE [ 292 ] OUT [ COMB : PIN [ 32 : FIX ] : FB [ PIN ]
  ,   D : PIN [ 32 : FIX ] : FB [ Q ]
  , CLK : PIN [ 13,-13,35,-35 ] ] ;
! NODE [ 293 ] OUT [ COMB : PIN [ 33 : FIX ] : FB [ PIN ]
  ,   D : PIN [ 33 : FIX ] : FB [ Q ]
  , CLK : PIN [ 13,-13,35,-35 ] ] ;
! NODE [ 294 ] OUT [ COMB : PIN [ 35 : FIX ] : FB [ PIN ]
  ,   D : PIN [ 35 : FIX ] : FB [ Q ]
  , CLK : PIN [ 13,-13 ] ] ;

! FLOAT [ 0 ]  INP
  && IREG [ CI : PIN [ 13,-13,35,-35 ]
  , LH : PIN [ 13,-13,35,-35 ]
  , API : PT [ 1 : PRG ]
  , ARI : PT [ 1 : PRG ]
  , IP [ PIN ] ]
  && OUT [ COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [ 16 : PRG ] : FB [ Q : PIN ]
  , T : PT [ 16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 13,-13,35,-35 ]
  , LH : PIN [ 13,-13,35,-35 ]
  , AP : PT [ 1 : PRG ] , AR : PT [ 1 : PRG ] , OE : PT [ 1 ] ] ;
" ------------------------------
$ C373 84 186
$ CY7C373 84 186
! IREG    6   20  22  41  62  65  83 ;
! IDBLREG 6  265 266 267 268 269 270 ;
! CELL GND VCC B B B B B B B B GND B B B B B B B B CLK VCC
       GND CLK B B B B B B B B GND B B B B B B B B I   VCC
       GND VCC B B B B B B B B GND B B B B B B B B CLK VCC
       GND CLK B B B B B B B B GND B B B B B B B B I   VCC  ;
! +QFB&PolarityAfterReg ;
! OUTPUT_CLK 4  20  23  62  65 ;
! INPUT_CLK  4  20  23  62  65 ;

! PIN [ 1,11,22,32,43,53,64,74 ] GND ;
! PIN [ 2,21,42,44,63,84 ] VCC ;
! PIN [ 41,83 ]
    IREG [ CI : PIN [ 20,-20,23,-23,62,-62,65,-65 ] ,
           LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ] , IP [ PIN ] ]
 && INP [ IP [ PIN ] ]
 && OUT [ LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ] ] ;
! PIN [ 20 ] WIRE
 && IREG [ CI : PIN [ 23,-23,62,-62,65,-65 ] ,
           LH : PIN [ 23,-23,62,-62,65,-65 ] , IP [ PIN ] ]
 && INP [ IP [ PIN ] ]
 && OUT [ LH : PIN [ 23,-23,62,-62,65,-65 ] ] ;
! PIN [ 23 ] WIRE
 && IREG [ CI : PIN [ 20,-20,62,-62,65,-65 ] ,
           LH : PIN [ 20,-20,62,-62,65,-65 ] , IP [ PIN ] ]
 && INP [ IP [ PIN ] ]
 && OUT [ LH : PIN [ 20,-20,62,-62,65,-65 ] ] ;
! PIN [ 62 ] WIRE
 && IREG [ CI : PIN [ 20,-20,23,-23,65,-65 ] ,
           LH : PIN [ 20,-20,23,-23,65,-65 ] , IP [ PIN ] ]
 && INP [ IP [ PIN ] ]
 && OUT [ LH : PIN [ 20,-20,23,-23,65,-65 ] ] ;
! PIN [ 65 ] WIRE
 && IREG [ CI : PIN [ 20,-20,23,-23,62,-62 ] ,
           LH : PIN [ 20,-20,23,-23,62,-62 ] , IP [ PIN ] ]
 && INP [ IP [ PIN ] ]
 && OUT [ LH : PIN [ 20,-20,23,-23,62,-62 ] ] ;
! PIN [ 3..10 ] OUT [     COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [  16 : PRG ] : FB [ Q : PIN ]
  , T : PT [  16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , AP : PT [ 1 : PRG ] : BANK [ 1 ]
  , AR : PT [ 1 : PRG ] : BANK [ 2 ]
  , OE : PT [ 1 ] : BANK [ 9,10 : GND : VCC ] ]
  && INP ;
! PIN [ 12..19 ] OUT [   COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [  16 : PRG ] : FB [ Q : PIN ]
  , T : PT [  16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , AP : PT [ 1 : PRG ] : BANK [ 1 ]
  , AR : PT [ 1 : PRG ] : BANK [ 2 ]
  , OE : PT [ 1 ] : BANK [ 9,10 : GND : VCC ] ]
  && INP ;
! PIN [ 24..31 ] OUT [   COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [  16 : PRG ] : FB [ Q : PIN ]
  , T : PT [  16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , AP : PT [ 1 : PRG ] : BANK [ 3 ]
  , AR : PT [ 1 : PRG ] : BANK [ 4 ]
  , OE : PT [ 1 ] : BANK [ 13,14 : GND : VCC ] ]
  && INP ;
! PIN [ 33..40 ] OUT [   COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [  16 : PRG ] : FB [ Q : PIN ]
  , T : PT [  16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , AP : PT [ 1 : PRG ] : BANK [ 3 ]
  , AR : PT [ 1 : PRG ] : BANK [ 4 ]
  , OE : PT [ 1 ] : BANK [ 13,14 : GND : VCC ] ]
  && INP ;
! PIN [ 45..52 ] OUT [   COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [  16 : PRG ] : FB [ Q : PIN ]
  , T : PT [  16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , AP : PT [ 1 : PRG ] : BANK [ 5 ]
  , AR : PT [ 1 : PRG ] : BANK [ 6 ]
  , OE : PT [ 1 ] : BANK [ 17,18 : GND : VCC ] ]
  && INP ;
! PIN [ 54..61 ] OUT [   COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [  16 : PRG ] : FB [ Q : PIN ]
  , T : PT [  16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , AP : PT [ 1 : PRG ] : BANK [ 5 ]
  , AR : PT [ 1 : PRG ] : BANK [ 6 ]
  , OE : PT [ 1 ] : BANK [ 17,18 : GND : VCC ] ]
  && INP ;
! PIN [ 66..73 ] OUT [   COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [  16 : PRG ] : FB [ Q : PIN ]
  , T : PT [  16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , AP : PT [ 1 : PRG ] : BANK [ 7 ]
  , AR : PT [ 1 : PRG ] : BANK [ 8 ]
  , OE : PT [ 1 ] : BANK [ 21,22 : GND : VCC ] ]
  && INP ;
! PIN [ 75..82 ] OUT [   COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [  16 : PRG ] : FB [ Q : PIN ]
  , T : PT [  16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , AP : PT [ 1 : PRG ] : BANK [ 7 ]
  , AR : PT [ 1 : PRG ] : BANK [ 8 ]
  , OE : PT [ 1 ] : BANK [ 21,22 : GND : VCC ] ]
  && INP ;

! NODE [ 85..240 ] INTERNAL_ONLY ;

! NODE [ 241 ] OUT [ OE : PT [ 1 ] : BANK [ 9 ] ] ;
! NODE [ 242 ] OUT [ OE : PT [ 1 ] : BANK [ 10 ] ] ;
! NODE [ 243 ] OUT [ AR : PT [ 1 : PRG ] : BANK [ 2 ] ] ;
! NODE [ 244 ] OUT [ AP : PT [ 1 : PRG ] : BANK [ 1 ] ] ;
! NODE [ 245 ] OUT [ OE : PT [ 1 ] : BANK [ 9 ] ] ;
! NODE [ 246 ] OUT [ OE : PT [ 1 ] : BANK [ 10 ] ] ;

! NODE [ 247 ] OUT [ OE : PT [ 1 ] : BANK [ 13 ] ] ;
! NODE [ 248 ] OUT [ OE : PT [ 1 ] : BANK [ 14 ] ] ;
! NODE [ 249 ] OUT [ AR : PT [ 1 : PRG ] : BANK [ 4 ] ] ;
! NODE [ 250 ] OUT [ AP : PT [ 1 : PRG ] : BANK [ 3 ] ] ;
! NODE [ 251 ] OUT [ OE : PT [ 1 ] : BANK [ 13 ] ] ;
! NODE [ 252 ] OUT [ OE : PT [ 1 ] : BANK [ 14 ] ] ;

! NODE [ 253 ] OUT [ OE : PT [ 1 ] : BANK [ 17 ] ] ;
! NODE [ 254 ] OUT [ OE : PT [ 1 ] : BANK [ 18 ] ] ;
! NODE [ 255 ] OUT [ AR : PT [ 1 : PRG ] : BANK [ 6 ] ] ;
! NODE [ 256 ] OUT [ AP : PT [ 1 : PRG ] : BANK [ 5 ] ] ;
! NODE [ 257 ] OUT [ OE : PT [ 1 ] : BANK [ 17 ] ] ;
! NODE [ 258 ] OUT [ OE : PT [ 1 ] : BANK [ 18 ] ] ;

! NODE [ 259 ] OUT [ OE : PT [ 1 ] : BANK [ 21 ] ] ;
! NODE [ 260 ] OUT [ OE : PT [ 1 ] : BANK [ 22 ] ] ;
! NODE [ 261 ] OUT [ AR : PT [ 1 : PRG ] : BANK [ 8 ] ] ;
! NODE [ 262 ] OUT [ AP : PT [ 1 : PRG ] : BANK [ 7 ] ] ;
! NODE [ 263 ] OUT [ OE : PT [ 1 ] : BANK [ 21 ] ] ;
! NODE [ 264 ] OUT [ OE : PT [ 1 ] : BANK [ 22 ] ] ;

! NODE [ 265 ] OUT [ COMB : PIN [ 20 : FIX ] : FB [ PIN ]
  ,   D : PIN [ 20 : FIX ] : FB [ Q ]
  , CLK : PIN [ 23,-23,62,-62,65,-65 ]  ] ;
! NODE [ 266 ] OUT [ COMB : PIN [ 23 : FIX ] : FB [ PIN ]
  ,   D : PIN [ 23 : FIX ] : FB [ Q ]
  , CLK : PIN [ 20,-20,62,-62,65,-65 ]  ] ;
! NODE [ 267 ] OUT [ COMB : PIN [ 41 : FIX ] : FB [ PIN ]
  ,   D : PIN [ 41 : FIX ] : FB [ Q ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]  ] ;
! NODE [ 268 ] OUT [ COMB : PIN [ 62 : FIX ] : FB [ PIN ]
  ,   D : PIN [ 62 : FIX ] : FB [ Q ]
  , CLK : PIN [ 20,-20,23,-23,65,-65 ]  ] ;
! NODE [ 269 ] OUT [ COMB : PIN [ 65 : FIX ] : FB [ PIN ]
  ,   D : PIN [ 65 : FIX ] : FB [ Q ]
  , CLK : PIN [ 20,-20,23,-23,62,-62 ]  ] ;
! NODE [ 270 ] OUT [ COMB : PIN [ 83 : FIX ] : FB [ PIN ]
  ,   D : PIN [ 83 : FIX ] : FB [ Q ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]  ] ;

! FLOAT [ 0 ]  INP
  && IREG [ CI : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  ,  LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , IP [ PIN ] ]
  && OUT [ COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [ 16 : PRG ] : FB [ Q : PIN ]
  , T : PT [ 16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , AP : PT [ 1 : PRG ] , AR : PT [ 1 : PRG ] , OE : PT [ 1 ] ] ;

" ------------------------------
$ C374 84 494
$ CY7C374 84 494
! IREG 70
    3   4   5   6   7   8   9  10  12  13  14  15  16  17  18  19  20  23
   24  25  26  27  28  29  30  31  33  34  35  36  37  38  39  40  41
   45  46  47  48  49  50  51  52  54  55  56  57  58  59  60  61  62  65
   66  67  68  69  70  71  72  73  75  76  77  78  79  80  81  82  83    ;
! IDBLREG 70
    0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0 573 574
    0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0 575
    0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0 576 577
    0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0 578    ;
! CELL
 GND VCC B B B B B B B B GND B B B B B B B B CLK VCC
 GND CLK B B B B B B B B GND B B B B B B B B I   VCC
 GND VCC B B B B B B B B GND B B B B B B B B CLK VCC
 GND CLK B B B B B B B B GND B B B B B B B B I   VCC
 P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P
 P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P
 P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P
 P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P
 P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P
 P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P
 P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P
 P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P
 U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N
 U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N
 U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N
 U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N ;
! +QFB&PolarityAfterReg ;
! OUTPUT_CLK 4  20  23  62  65 ;
! INPUT_CLK  4  20  23  62  65 ;

! PIN [ 1,11,22,32,43,53,64,74 ] GND ;
! PIN [ 2,21,42,44,63,84 ] VCC ;
! PIN [ 41,83 ]
    IREG [ CI : PIN [ 20,-20,23,-23,62,-62,65,-65 ] ,
           LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ] , IP [ PIN ] ]
 && INP [ IP [ PIN ] ]
 && OUT [ LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ] ] ;
! PIN [ 20 ] WIRE
 && IREG [ CI : PIN [ 23,-23,62,-62,65,-65 ] ,
           LH : PIN [ 23,-23,62,-62,65,-65 ] , IP [ PIN ] ]
 && INP [ IP [ PIN ] ]
 && OUT [ LH : PIN [ 23,-23,62,-62,65,-65 ] ] ;
! PIN [ 23 ] WIRE
 && IREG [ CI : PIN [ 20,-20,62,-62,65,-65 ] ,
           LH : PIN [ 20,-20,62,-62,65,-65 ] , IP [ PIN ] ]
 && INP [ IP [ PIN ] ]
 && OUT [ LH : PIN [ 20,-20,62,-62,65,-65 ] ] ;
! PIN [ 62 ] WIRE
 && IREG [ CI : PIN [ 20,-20,23,-23,65,-65 ] ,
           LH : PIN [ 20,-20,23,-23,65,-65 ] , IP [ PIN ] ]
 && INP [ IP [ PIN ] ]
 && OUT [ LH : PIN [ 20,-20,23,-23,65,-65 ] ] ;
! PIN [ 65 ] WIRE
 && IREG [ CI : PIN [ 20,-20,23,-23,62,-62 ] ,
           LH : PIN [ 20,-20,23,-23,62,-62 ] , IP [ PIN ] ]
 && INP [ IP [ PIN ] ]
 && OUT [ LH : PIN [ 20,-20,23,-23,62,-62 ] ] ;
! PIN [ 3 ] OUT [ COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [  16 : PRG ] : FB [ Q : PIN ]
  , T : PT [  16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , AP : PT [ 1 : PRG ] : BANK [ 1 ]
  , AR : PT [ 1 : PRG ] : BANK [ 2 ]
  , OE : PT [ 1 ] : BANK [ 17,18 : GND : VCC ] ]
  && IREG [ CI : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  ,         LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , API : PT [ 1 : PRG ] : BANK [ 1 ]
  , ARI : PT [ 1 : PRG ] : BANK [ 2 ]
  , IP [ PIN : USE 398 ] ]
  && INP ;
! PIN [ 4 ] OUT [ COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [  16 : PRG ] : FB [ Q : PIN ]
  , T : PT [  16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , AP : PT [ 1 : PRG ] : BANK [ 1 ]
  , AR : PT [ 1 : PRG ] : BANK [ 2 ]
  , OE : PT [ 1 ] : BANK [ 17,18 : GND : VCC ] ]
  && IREG [ CI : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  ,         LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , API : PT [ 1 : PRG ] : BANK [ 1 ]
  , ARI : PT [ 1 : PRG ] : BANK [ 2 ]
  , IP [ PIN : USE 400 ] ]
  && INP ;
! PIN [ 5 ] OUT [ COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [  16 : PRG ] : FB [ Q : PIN ]
  , T : PT [  16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , AP : PT [ 1 : PRG ] : BANK [ 1 ]
  , AR : PT [ 1 : PRG ] : BANK [ 2 ]
  , OE : PT [ 1 ] : BANK [ 17,18 : GND : VCC ] ]
  && IREG [ CI : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  ,         LH : PIN [ 20,-20,23,-23,62,-62,65,-65 ]
  , API : PT [ 1 : PRG ] : BANK [ 1 ]
  , ARI : PT [ 1 : PRG ] : BANK [ 2 ]
  , IP [ PIN : USE 402 ] ]
  && INP ;
! PIN [ 6 ] OUT [ COMB : PT [  16 : PRG ] : FB [ CMB : PIN ]
  , D : PT [  16 : PRG ] : FB [ Q : PIN ]
  , T : PT [  16 : PRG ] : FB [ Q : PIN ]
  , CLK : PIN [ 20,-20,23,-23,62,-62,65,-65 ]