📄 c37x.drc
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" Device Design Rule File (V3.15)" ------------------------------$ C371 44 286$ CY7371 44 286! IREG 6 10 11 13 32 33 35 ;! IDBLREG 6 325 326 327 328 329 330 ;! CELL GND B B B B B B B B I I GND CLK B B B B B B B B VCC GND B B B B B B B B I I GND CLK B B B B B B B B VCC ;! +QFB&PolarityAfterReg ;! OUTPUT_CLK 2 13 35 ;! INPUT_CLK 2 13 35 ;! PIN [ 1,12,23,34 ] GND ;! PIN [ 22,44 ] VCC ;! PIN [ 10,11,32,33 ] IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , IP [ PIN ] ] && INP [ IP [ PIN ] ] && OUT [ LH : PIN [ 13,-13,35,-35 ] ] ;! PIN [ 13 ] WIRE && IREG [ CI : PIN [ 35,-35 ] , LH : PIN [ 35,-35 ] , IP [ PIN ] ] && INP [ IP [ PIN ] ] && OUT [ LH : PIN [ 35,-35 ] ] ;! PIN [ 35 ] WIRE && IREG [ CI : PIN [ 13,-13 ] , LH : PIN [ 13,-13 ] , IP [ PIN ] ] && INP [ IP [ PIN ] ] && OUT [ LH : PIN [ 13 ] ] ;! PIN [ 2..9 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 1 ] , AR : PT [ 1 : PRG ] : BANK [ 2 ] , OE : PT [ 1 ] : BANK [ 5,6 : GND : VCC ] ] && INP ;! PIN [ 14..21 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 1 ] , AR : PT [ 1 : PRG ] : BANK [ 2 ] , OE : PT [ 1 ] : BANK [ 5,6 : GND : VCC ] ] && INP ;! PIN [ 24..31 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 3 ] , AR : PT [ 1 : PRG ] : BANK [ 4 ] , OE : PT [ 1 ] : BANK [ 9,10 : GND : VCC ] ] && INP ;! PIN [ 36..43 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 3 ] , AR : PT [ 1 : PRG ] : BANK [ 4 ] , OE : PT [ 1 ] : BANK [ 9,10 : GND : VCC ] ] && INP ;! NODE [ 45..310 ] INTERNAL_ONLY ;! NODE [ 311 ] OUT [ OE : PT [ 1 ] : BANK [ 5 ] ] ;! NODE [ 312 ] OUT [ OE : PT [ 1 ] : BANK [ 6 ] ] ;! NODE [ 313 ] OUT [ AR : PT [ 1 : PRG ] : BANK [ 2 ] ] ;! NODE [ 314 ] OUT [ AP : PT [ 1 : PRG ] : BANK [ 1 ] ] ;! NODE [ 315 ] OUT [ OE : PT [ 1 ] : BANK [ 5 ] ] ;! NODE [ 316 ] OUT [ OE : PT [ 1 ] : BANK [ 6 ] ] ;! NODE [ 319 ] OUT [ OE : PT [ 1 ] : BANK [ 9 ] ] ;! NODE [ 320 ] OUT [ OE : PT [ 1 ] : BANK [ 10 ] ] ;! NODE [ 321 ] OUT [ AR : PT [ 1 : PRG ] : BANK [ 4 ] ] ;! NODE [ 322 ] OUT [ AP : PT [ 1 : PRG ] : BANK [ 3 ] ] ;! NODE [ 323 ] OUT [ OE : PT [ 1 ] : BANK [ 9 ] ] ;! NODE [ 324 ] OUT [ OE : PT [ 1 ] : BANK [ 10 ] ] ;! NODE [ 325 ] OUT [ COMB : PIN [ 10 : FIX ] : FB [ PIN ] , D : PIN [ 10 : FIX ] : FB [ Q ] , CLK : PIN [ 13,-13,35,-35 ] ] ;! NODE [ 326 ] OUT [ COMB : PIN [ 11 : FIX ] : FB [ PIN ] , D : PIN [ 11 : FIX ] : FB [ Q ] , CLK : PIN [ 13,-13,35,-35 ] ] ;! NODE [ 327 ] OUT [ COMB : PIN [ 13 : FIX ] : FB [ PIN ] , D : PIN [ 13 : FIX ] : FB [ Q ] , CLK : PIN [ 35,-35 ] ] ;! NODE [ 328 ] OUT [ COMB : PIN [ 32 : FIX ] : FB [ PIN ] , D : PIN [ 32 : FIX ] : FB [ Q ] , CLK : PIN [ 13,-13,35,-35 ] ] ;! NODE [ 329 ] OUT [ COMB : PIN [ 33 : FIX ] : FB [ PIN ] , D : PIN [ 33 : FIX ] : FB [ Q ] , CLK : PIN [ 13,-13,35,-35 ] ] ;! NODE [ 330 ] OUT [ COMB : PIN [ 35 : FIX ] : FB [ PIN ] , D : PIN [ 35 : FIX ] : FB [ Q ] , CLK : PIN [ 13,-13 ] ] ;! FLOAT [ 0 ] INP && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , IP [ PIN ] ] && OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] , AR : PT [ 1 : PRG ] , OE : PT [ 1 ] ] ;" ------------------------------$ C372 44 250$ CY7C372 44 250! IREG 38 2 3 4 5 6 7 8 9 10 11 13 14 15 16 17 18 19 20 21 24 25 26 27 28 29 30 31 32 33 35 36 37 38 39 40 41 42 43 ;! IDBLREG 38 0 0 0 0 0 0 0 0 289 290 291 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 292 293 294 0 0 0 0 0 0 0 0 ;! CELL GND B B B B B B B B I I GND CLK B B B B B B B B VCC GND B B B B B B B B I I GND CLK B B B B B B B B VCC P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N U N ;! +QFB&PolarityAfterReg ;! OUTPUT_CLK 2 13 35 ;! INPUT_CLK 2 13 35 ;! PIN [ 1,12,23,34 ] GND ;! PIN [ 22,44 ] VCC ;! PIN [ 10,11,32,33 ] IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , IP [ PIN ] ] && INP [ IP [ PIN ] ] && OUT [ LH : PIN [ 13,-13,35,-35 ] ] ;! PIN [ 13 ] WIRE && IREG [ CI : PIN [ 35,-35 ] , LH : PIN [ 35,-35 ] , IP [ PIN ] ] && INP [ IP [ PIN ] ] && OUT [ LH : PIN [ 35,-35 ] ] ;! PIN [ 35 ] WIRE && IREG [ CI : PIN [ 13,-13 ] , LH : PIN [ 13,-13 ] , IP [ PIN ] ] && INP [ IP [ PIN ] ] && OUT [ LH : PIN [ 13,-13 ] ] ;! PIN [ 2 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 1 ] , AR : PT [ 1 : PRG ] : BANK [ 2 ] , OE : PT [ 1 ] : BANK [ 9,10 : GND : VCC ] ] && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , API : PT [ 1 : PRG ] : BANK [ 1 ] , ARI : PT [ 1 : PRG ] : BANK [ 2 ] , IP [ PIN : USE 202 ] ] && INP ;! PIN [ 3 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 1 ] , AR : PT [ 1 : PRG ] : BANK [ 2 ] , OE : PT [ 1 ] : BANK [ 9,10 : GND : VCC ] ] && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , API : PT [ 1 : PRG ] : BANK [ 1 ] , ARI : PT [ 1 : PRG ] : BANK [ 2 ] , IP [ PIN : USE 204 ] ] && INP ;! PIN [ 4 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 1 ] , AR : PT [ 1 : PRG ] : BANK [ 2 ] , OE : PT [ 1 ] : BANK [ 9,10 : GND : VCC ] ] && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , API : PT [ 1 : PRG ] : BANK [ 1 ] , ARI : PT [ 1 : PRG ] : BANK [ 2 ] , IP [ PIN : USE 206] && INP ;! PIN [ 5 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 1 ] , AR : PT [ 1 : PRG ] : BANK [ 2 ] , OE : PT [ 1 ] : BANK [ 9,10 : GND : VCC ] ] && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , API : PT [ 1 : PRG ] : BANK [ 1 ] , ARI : PT [ 1 : PRG ] : BANK [ 2 ] , IP [ PIN : USE 208] && INP ;! PIN [ 6 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 1 ] , AR : PT [ 1 : PRG ] : BANK [ 2 ] , OE : PT [ 1 ] : BANK [ 9,10 : GND : VCC ] ] && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , API : PT [ 1 : PRG ] : BANK [ 1 ] , ARI : PT [ 1 : PRG ] : BANK [ 2 ] , IP [ PIN : USE 210 ] ] && INP ;! PIN [ 7 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 1 ] , AR : PT [ 1 : PRG ] : BANK [ 2 ] , OE : PT [ 1 ] : BANK [ 9,10 : GND : VCC ] ] && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , API : PT [ 1 : PRG ] : BANK [ 1 ] , ARI : PT [ 1 : PRG ] : BANK [ 2 ] , IP [ PIN : USE 212 ] ] && INP ;! PIN [ 8 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 1 ] , AR : PT [ 1 : PRG ] : BANK [ 2 ] , OE : PT [ 1 ] : BANK [ 9,10 : GND : VCC ] ] && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , API : PT [ 1 : PRG ] : BANK [ 1 ] , ARI : PT [ 1 : PRG ] : BANK [ 2 ] , IP [ PIN : USE 214 ] ] && INP ;! PIN [ 9 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 1 ] , AR : PT [ 1 : PRG ] : BANK [ 2 ] , OE : PT [ 1 ] : BANK [ 9,10 : GND : VCC ] ] && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , API : PT [ 1 : PRG ] : BANK [ 1 ] , ARI : PT [ 1 : PRG ] : BANK [ 2 ] , IP [ PIN : USE 216 ] ] && INP ;! PIN [ 14 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 3 ] , AR : PT [ 1 : PRG ] : BANK [ 4 ] , OE : PT [ 1 ] : BANK [ 11,12 : GND : VCC ] ] && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , API : PT [ 1 : PRG ] : BANK [ 3 ] , ARI : PT [ 1 : PRG ] : BANK [ 4 ] , IP [ PIN : USE 218 ] ] && INP ;! PIN [ 15 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 3 ] , AR : PT [ 1 : PRG ] : BANK [ 4 ] , OE : PT [ 1 ] : BANK [ 11,12 : GND : VCC ] ] && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , API : PT [ 1 : PRG ] : BANK [ 3 ] , ARI : PT [ 1 : PRG ] : BANK [ 4 ] , IP [ PIN : USE 220 ] ] && INP ;! PIN [ 16 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 3 ] , AR : PT [ 1 : PRG ] : BANK [ 4 ] , OE : PT [ 1 ] : BANK [ 11,12 : GND : VCC ] ] && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , API : PT [ 1 : PRG ] : BANK [ 3 ] , ARI : PT [ 1 : PRG ] : BANK [ 4 ] , IP [ PIN : USE 222 ] ] && INP ;! PIN [ 17 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 3 ] , AR : PT [ 1 : PRG ] : BANK [ 4 ] , OE : PT [ 1 ] : BANK [ 11,12 : GND : VCC ] ] && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , API : PT [ 1 : PRG ] : BANK [ 3 ] , ARI : PT [ 1 : PRG ] : BANK [ 4 ] , IP [ PIN : USE 224 ] ] && INP ;! PIN [ 18 ] OUT [ COMB : PT [ 16 : PRG ] : FB [ CMB : PIN ] , D : PT [ 16 : PRG ] : FB [ Q : PIN ] , T : PT [ 16 : PRG ] : FB [ Q : PIN ] , CLK : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ] , AP : PT [ 1 : PRG ] : BANK [ 3 ] , AR : PT [ 1 : PRG ] : BANK [ 4 ] , OE : PT [ 1 ] : BANK [ 11,12 : GND : VCC ] ] && IREG [ CI : PIN [ 13,-13,35,-35 ] , LH : PIN [ 13,-13,35,-35 ]
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