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"Block B signals ordered 1-> N crossref'd against total device signals! PINXREF 52 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 43 42 41 40 39 38 37 36 31 30 29 28 27 26 25 24 ;"Macrocell types used by Utilization tables! CELL P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P B B B B B B B B B B B B B B B B ;"Block B macrocell physical assignment! MCELLPOS 16 24 25 26 27 28 29 30 31 36 37 38 39 40 41 42 43 ;"Block B I/O macrocells supporting dual feedback! FB2_IO 16 43 42 41 40 39 38 37 36 31 30 29 28 27 26 25 24 ;"Block B pinout diagram! PINOUT 144 0 81 0 0 0 82 0 24 0 83 0 0 0 84 0 25 0 85 0 0 0 86 0 26 0 87 0 0 0 88 0 27 0 89 0 0 0 90 0 28 0 91 0 0 0 92 0 29 0 93 0 0 0 94 0 30 0 95 0 0 0 96 0 31 0 97 0 0 0 98 0 36 0 99 0 0 0 100 0 37 0 101 0 0 0 102 0 38 0 103 0 0 0 104 0 39 0 105 0 0 0 106 0 40 0 107 0 0 0 108 0 41 0 109 0 0 0 110 0 42 0 111 0 0 0 112 0 43 0 113 0 0 0 114 0 0 0 115 0 0 0 116 0 0 ;"Block B product term input signal order! PT 72 81 -81 82 -82 83 -83 84 -84 85 -85 86 -86 87 -87 88 -88 89 -89 90 -90 91 -91 92 -92 93 -93 94 -94 95 -95 96 -96 97 -97 98 -98 99 -99 100 -100 101 -101 102 -102 103 -103 104 -104 105 -105 106 -106 107 -107 108 -108 109 -109 110 -110 111 -111 112 -112 113 -113 114 -114 115 -115 116 -116 ;" -----------------------------$ C372 4$ CY7C372 4" ---------------------------------------------------------------------------" NODE definition" 45 .. 188 Interconnect NODES" 189 .. 220 Buried Macrocells" 221 .. 224 Special PTs (LAB 1 Global OE & AR/AP)" 225 .. 228 Special PTs (LAB 2 Global OE & AR/AP)" 229 .. 232 Special PTs (LAB 3 Global OE & AR/AP)" 233 .. 236 Special PTs (LAB 4 Global OE & AR/AP)" 237 .. 242 Double Registered Inputs" ---------------------------------------------------------------------------" ! ShowDbgFAILPARTITION ;" ! ShowDbgPTALLOC ;" ! ShowDbgBANKS ;" ! ShowDbgROUTE ;! IREG_NODES 38 189 190 191 192 193 194 195 196 10 11 13 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 32 33 35 213 214 215 216 217 218 219 220 ;! LOGICPT 242 -1 16 16 16 16 16 16 16 16 0 0 -1 0 16 16 16 16 16 16 16 16 -1 -1 16 16 16 16 16 16 16 16 0 0 -1 0 16 16 16 16 16 16 16 16 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ;# ROUTE_MATRIX ;"node numbers entering route matrix, minus numbers represent internal feedback! PIM_INPUTS 102 13 35 10 11 32 33 2 -2 3 -3 4 -4 5 -5 6 -6 7 -7 8 -8 9 -9 -189 -190 -191 -192 -193 -194 -195 -196 14 -14 15 -15 16 -16 17 -17 18 -18 19 -19 20 -20 21 -21 -197 -198 -199 -200 -201 -202 -203 -204 24 -24 25 -25 26 -26 27 -27 28 -28 29 -29 30 -30 31 -31 -205 -206 -207 -208 -209 -210 -211 -212 36 -36 37 -37 38 -38 39 -39 40 -40 41 -41 42 -42 43 -43 -213 -214 -215 -216 -217 -218 -219 -220 ;" node numbers exiting route matrix! PIM_OUTPUTS 45..188 ;" ---------------------------------------------------------------------------# PT_ALLOCATE! PT_ARRAY 0 16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ; 16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ; 16 0 0 0 0 0 0 1 1 1 1 2 2 2 2 3 3 ;! PT_ARRAY 1 16 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 ; 16 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 ; 16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 ;! PT_ARRAY 2 16 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 ; 16 2 2 2 2 2 2 1 1 1 1 1 1 0 0 0 0 ; 16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 ;! PT_ARRAY 3 16 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 ; 16 3 3 2 2 2 2 2 2 1 1 1 1 0 0 0 0 ; 16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 ;! PT_ARRAY 4 16 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 ; 16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0 ; 16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 ;! PT_ARRAY 5 16 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 ; 16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0 ; 16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 ;! PT_ARRAY 6 16 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 ; 16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0 ; 16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 ;! PT_ARRAY 7 16 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 ; 16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0 ; 16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 ;! PT_ARRAY 8 16 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 ; 16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0 ; 16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 ;! PT_ARRAY 9 16 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 ; 16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0 ; 16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 ;! PT_ARRAY 10 16 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 ; 16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0 ; 16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 ;! PT_ARRAY 11 16 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 ; 16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0 ; 16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 ;! PT_ARRAY 12 16 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 ; 16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0 ; 16 0 0 0 0 1 1 1 1 2 2 2 2 2 2 3 3 ;! PT_ARRAY 13 16 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 ; 16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0 ; 16 0 0 0 0 1 1 1 1 1 1 2 2 2 2 2 2 ;! PT_ARRAY 14 16 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 ; 16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0 ; 16 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 ;! PT_ARRAY 15 16 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 ; 16 3 3 2 2 2 2 1 1 1 1 0 0 0 0 0 0 ; 16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ;" ---------------------------------------------------------------------------# LAB 1 ;! IO_MC# 8 ;! BURIED_MC# 8 ;! PIM_IN_SRC# 24 ;! INP_TO_LAB# 36 ;! BANK_AP# 1 224 ;! BANK_AR# 2 223 ;! BANK_OE# 2 9 10 ;! CLOCKS# 2 13 35 ;" each entry is indexed to PIM_INPUTS! MUX_INTERCONNECT -> 8 45 49 53 58 61 66 70 74 -> 8 50 53 57 58 62 66 70 74 -> 8 45 47 55 57 62 66 70 74 -> 8 45 46 54 57 62 66 70 74 -> 8 48 49 51 57 60 66 70 74 -> 8 49 50 52 56 57 66 70 74 -> 8 45 46 58 59 67 72 76 79 -> 9 46 47 55 59 63 67 72 76 79 -> 8 46 48 55 60 67 72 76 79 -> 9 49 50 55 59 61 67 72 76 79 -> 8 50 55 56 62 68 72 76 79 -> 9 46 51 55 59 63 68 72 76 79 -> 8 51 52 57 64 68 72 76 79 -> 9 51 53 55 59 65 68 72 76 79 -> 8 47 51 58 60 68 72 76 79 -> 9 48 51 59 61 63 68 72 76 79 -> 8 49 51 59 62 68 72 76 79 -> 9 50 51 55 59 63 68 72 76 79 -> 8 45 51 59 64 68 72 76 79 -> 9 51 52 59 64 65 68 72 76 79 -> 8 46 53 64 66 68 72 76 79 -> 9 51 54 55 56 64 68 72 76 79 -> 9 45 49 54 56 62 66 70 75 80 -> 8 45 46 49 55 57 66 70 75 -> 9 47 49 53 58 64 66 70 75 80 -> 8 45 48 49 58 59 64 70 75 -> 9 45 49 53 58 60 63 70 75 80 -> 8 45 50 53 54 58 61 70 75 -> 9 48 51 53 58 62 65 71 75 80 -> 8 45 49 52 62 63 66 71 75 -> 9 46 47 51 60 62 68 72 77 79 -> 8 45 51 61 64 68 72 77 79 -> 9 47 55 60 63 64 68 72 77 79 -> 8 47 54 59 63 68 72 77 79 -> 9 47 53 54 58 64 68 72 77 79 -> 8 49 52 57 64 68 72 77 79 -> 9 47 51 56 60 65 68 73 77 79 -> 8 48 50 60 66 68 73 77 79 -> 9 45 53 56 60 64 68 73 77 80 -> 8 55 59 61 63 68 73 77 80 -> 9 47 54 56 58 61 68 73 77 80 -> 8 47 53 57 62 68 73 77 80 -> 9 47 52 56 60 64 69 73 77 80 -> 8 48 51 57 66 69 73 77 80 -> 9 50 53 60 64 65 69 73 77 80 -> 8 47 49 60 64 69 73 77 80 -> 9 45 49 55 58 62 66 71 75 80 -> 8 45 49 54 57 60 66 71 75 -> 9 45 53 56 58 62 66 71 75 80 -> 8 45 49 52 58 62 66 71 75 -> 9 49 51 54 58 65 67 71 75 80 -> 8 50 54 58 59 64 67 71 75 -> 9 47 49 50 58 63 67 71 75 80 -> 8 46 47 48 58 62 67 71 75 -> 8 47 50 52 59 64 69 73 77 -> 9 47 50 52 53 60 64 69 73 77 -> 8 51 52 54 60 61 69 73 77 -> 9 48 52 55 56 60 62 69 73 77 -> 8 45 52 57 60 63 69 73 77 -> 9 46 52 56 60 62 64 69 73 77 -> 8 47 48 56 58 65 69 73 77 -> 9 48 52 56 59 61 66 69 73 77 -> 8 51 53 56 61 65 69 73 78 -> 9 46 52 54 56 62 65 69 73 78 -> 8 48 52 55 63 65 69 73 78 -> 9 45 51 52 56 61 64 69 73 78 -> 8 46 52 59 61 65 69 73 78 -> 9 47 52 56 62 65 66 69 73 78 -> 8 48 52 56 60 65 69 74 78 -> 9 48 49 52 57 63 65 69 74 78 -> 9 49 50 51 57 62 67 71 75 80 -> 8 50 52 54 58 63 67 71 75 -> 9 50 53 56 59 63 67 71 75 80 -> 8 50 54 55 60 63 67 71 75 -> 9 48 50 54 55 61 67 71 75 80 -> 8 45 54 58 62 63 67 71 75 -> 9 46 50 54 63 65 67 71 75 80 -> 8 46 47 50 64 66 67 71 75 -> 9 46 48 52 57 59 65 69 74 78 -> 8 48 51 57 60 65 69 74 78 -> 9 45 48 50 60 61 63 69 74 78 -> 8 48 49 56 62 65 69 74 78 -> 9 48 51 53 57 61 63 70 74 78 -> 8 47 48 55 61 64 70 74 78 -> 9 46 53 56 57 58 65 70 74 78 -> 8 45 54 57 61 66 70 74 78 -> 9 47 51 53 57 61 65 70 74 78 -> 8 48 50 60 62 65 70 74 78 -> 9 49 53 55 59 61 64 70 74 78 -> 8 48 53 57 58 63 70 74 78 -> 9 47 57 60 61 62 66 70 74 78 -> 8 46 54 56 61 65 70 74 78 -> 9 45 53 56 57 61 66 70 74 78 -> 8 49 53 55 61 65 70 74 78 -> 9 46 50 54 59 62 67 71 76 80 -> 8 46 49 54 58 61 67 71 76 -> 9 46 48 54 57 63 67 71 76 80 -> 8 46 47 55 56 63 67 71 76 -> 9 46 50 54 55 66 67 71 76 80 -> 8 45 50 55 59 65 67 71 76 -> 9 46 53 55 59 64 67 72 76 80 -> 8 46 52 54 59 63 67 72 76 ;"list of interconnect inputs into LAB! PIM# 36 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 ;"Block A signals ordered 1->N crossref'd against total device signals! PINXREF 52 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 189 2 190 3 191 4 192 5 193 6 194 7 195 8 196 9 ;"Macrocell types used by Utilization tables! CELL P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P N B N B N B N B N B N B N B N B ;"Block A macrocell physical assignment! MCELLPOS 16 2 189 3 190 4 191 5 192 6 193 7 194 8 195 9 196 ;"Block A I/O macrocells supporting dual feedback! FB2_IO 8 2 3 4 5 6 7 8 9 ;"Block A pinout diagram! PINOUT 144 0 45 0 0 0 46 0 0 0 47 0 0 0 48 0 0 0 49 0 2 0 50 0 0 0 51 189 0 0 52 0 0 0 53 0 3 0 54 0 0 0 55 190 0 0 56 0 0 0 57 0 4 0 58 0 0 0 59 191 0 0 60 0 0 0 61 0 5 0 62 0 0 0 63 192 0 0 64 0 0 0 65 0 6 0 66 0 0 0 67 193 0 0 68 0 0 0 69 0 7 0 70 0 0 0 71 194 0 0 72 0 0 0 73 0 8 0 74 0 0 0 75 195 0 0 76 0 0 0 77 0 9 0 78 0 0 0 79 196 0 0 80 0 0 ;"Block A product term input signal order! PT 72 45 -45 46 -46 47 -47 48 -48 49 -49 50 -50 51 -51 52 -52 53 -53 54 -54 55 -55 56 -56 57 -57 58 -58 59 -59 60 -60 61 -61 62 -62 63 -63 64 -64 65 -65 66 -66 67 -67 68 -68 69 -69 70 -70 71 -71 72 -72 73 -73 74 -74 75 -75 76 -76 77 -77 78 -78 79 -79 80 -80 ;" ---------------------------------------------------------------------------# LAB 2 ;! IO_MC# 8 ;! BURIED_MC# 8 ;! PIM_IN_SRC# 24 ;! INP_TO_LAB# 36 ;! BANK_AP# 3 228 ;! BANK_AR# 4 227 ;! BANK_OE# 2 11 12 ;
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