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commit a3063eec775719b7e91023bbec3f64b3118791dfAuthor: Kumar Gala <galak@kernel.crashing.org>Date: Thu Oct 11 00:18:48 2007 -0500 Set OF_STDOUT_PATH to match the default console on MPC8568 MDS On the MPC8568 MDS we use ttyS0, UART0, etc. as the standard configured console. Make it so we match that config what we tell Linux as the early STDOUT console. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>commit e1ce3cb617bb06f91f82f98915391175addf3e82Author: Kumar Gala <galak@kernel.crashing.org>Date: Tue Oct 2 11:12:27 2007 -0500 Remove magic numbers from cache related operations for mpc85xx The mpc85xx start code uses some magic numbers that we actually have #defines for in <config.h> so use those instead. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>commit 5441f61a3d8b7034f19fc1361183e936198e6dbbAuthor: Detlev Zundel <dzu@denx.de>Date: Fri Oct 19 16:47:26 2007 +0200 Fix two typos. Signed-off-by: Detlev Zundel <dzu@denx.de>commit 281df457c1aa50d2752165d0c5c3282d4027b974Author: Tony Li <tony.li@freescale.com>Date: Thu Oct 18 17:47:19 2007 +0800 mpc83xx: Add configure entry for MPC83xx ATM support Add MPC8360EMDS_ATM_config and MPC832XEMDS_ATM_config into Makfile and MAKEALL Signed-off-by: Tony Li <tony.li@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>commit d2646554f529a9577515eceb0ec5eceee18244baAuthor: Tony Li <tony.li@freescale.com>Date: Thu Oct 18 17:44:38 2007 +0800 mpc83xx: pq-mds-pib.c typo error Correct to val8 from val. Signed-off-by: Tony Li <tony.li@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>commit 3e11ae80fec1ee12194940955431186abf6009c2Author: Stefan Roese <sr@denx.de>Date: Wed Oct 17 15:40:19 2007 +0200 ppc4xx: Add 667/133 (CPU/PLB) frequency setup to Sequoia bootstrap command Signed-off-by: Stefan Roese <sr@denx.de>commit 7ee6ba1a056e4061ab4cfde30127e332e7957afdAuthor: runet@innovsys.com <runet@innovsys.com>Date: Tue Oct 16 14:50:40 2007 -0500 Make MPC8266ADS board compile again. Signed-off-by: Runet Torgersen <runet@innovsys.com>commit 2491167c245d8ebe6f2dbd8c4287aaa0d14fe93aAuthor: Jon Loeliger <jdl@freescale.com>Date: Mon Aug 27 12:41:03 2007 -0500 86xx: Allow for fewer DDR slots per memory controller. As a direct correlation exists between DDR DIMM slots and SPD EEPROM addresses used to configure them, use the individually defined SPD_EEPROM_ADDRESS* values to determine if a DDR DIMM slot should have its SPD configuration read or not. Effectively, this now allows for 1 or 2 DIMM slots per memory controller. Signed-off-by: Jon Loeliger <jdl@freescale.com>commit 4d4a945e189a2f384c66432316da2788a0ac1607Author: Rodolfo Giometti <giometti@enneenne.com>Date: Mon Oct 15 11:59:17 2007 +0200 PXA USB OHCI: "usb stop" implementation. Some USB keys need to be switched off before loading the kernel otherwise they can remain in an undefined status which prevents them to be correctly recognized by the kernel. Signed-off-by: Rodolfo Giometti <giometti@linux.it>commit e2e93442e558cf1500e92861f99713b2f045ea22Author: Stefan Roese <sr@denx.de>Date: Mon Oct 15 11:39:00 2007 +0200 ppc4xx: Fix bug in I2C bootstrap values for Sequoia/Rainier The I2C bootstrap values that can be setup via the "bootstrap" command, were setup incorrect regarding the generation of the internal sync PCI clock. The values for PLB clock == 133MHz were slighly incorrect and the values for PLB clock == 166MHz were totally incorrect. This could lead to a hangup upon booting while PCI configuration scan. This patch fixes this issue and configures valid PCI divisor values for the sync PCI clock, with respect to the provided external async PCI frequency. Here the values of the formula in the chapter 14.2 "PCI clocking" from the 440EPx users manual: AsyncPCICLK - 1MHz <= SyncPCIClk <= (2 * AsyncPCIClk) - 1MHz 33MHz async PCI frequency: PLB = 133: => 32 <= 44.3 <= 65 (div = 3) PLB = 166: => 32 <= 55.3 <= 65 (div = 3) 66MHz async PCI frequency: PLB = 133: => 65 <= 66.5 <= 132 (div = 2) PLB = 166: => 65 <= 83 <= 132 (div = 2) Signed-off-by: Stefan Roese <sr@denx.de>commit 5a5958b7de70ae99f0e7cbd5c97ec1346e051587Author: Stefan Roese <sr@denx.de>Date: Mon Oct 15 11:29:33 2007 +0200 ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & Yosemite The BCSR status bit for the 66MHz PCI operation was correctly addressed (MSB/LSB problem). Now the correct currently setup PCI frequency is displayed upon bootup. This patch also fixes this problem on Rainier & Yellowstone, since these boards use the same souce code as Sequoia & Yosemite do. Signed-off-by: Stefan Roese <sr@denx.de>commit da3aad55cbde80ab6e301aafa82a2c411aa53effAuthor: Martin Krause <martin.krause@tqs.de>Date: Wed Sep 26 17:55:56 2007 +0200 TQM860M: adjust for doubled flash sector size. Adjust flash map to support the new S29GLxxN (N-Type) Flashes with doubled sector size. Signed-off-by: Martin Krause <martin.krause@tqs.de>commit 9d29250e2e62f4bf20c7a20b4173d84c48f11f5dAuthor: Jens Gehrlein <jens.gehrlein@tqs.de>Date: Wed Sep 26 17:55:54 2007 +0200 TQM8xx: Fix CAN timing. Signed-off-by: Martin Krause <martin.krause@tqs.de>commit d43e489baf02afae49077791fb22332d240d8656Author: Martin Krause <martin.krause@tqs.de>Date: Thu Sep 27 14:54:36 2007 +0200 TQM866M: fix SDRAM refresh At 133 MHz the current SDRAM refresh rate is too fast (measured 4 * 1.17 us). CFG_MAMR_PTA changes from 39 to 97. This result in a refresh rate of 4 * 7.8 us at the default clock 50 MHz. At 133 MHz the value will be then 4 * 2.9 us. This is a compromise until a new method is found to adjust the refresh rate. Signed-off-by: Martin Krause <martin.krause@tqs.de>commit 9ef57bbee1c67cc01da2026c242c4692db32be36Author: Martin Krause <martin.krause@tqs.de>Date: Wed Sep 26 17:55:55 2007 +0200 TQM866M: adjust for doubled flash sector size. Adjust flash map to support the new S29GLxxN (N-Type) Flashes with doubled sector size. Signed-off-by: Martin Krause <martin.krause@tqs.de>commit f8bf90461d9bad2e6fed31fcebaf235f60dd6763Author: Michal Simek <monstr@monstr.eu>Date: Sun Oct 14 16:12:29 2007 +0200 [FIX] XUPV2P change command handling and remove code violationcommit 636400198228d96983c06657b17f760f5989958eAuthor: Wolfgang Denk <wd@denx.de>Date: Sun Oct 14 00:13:19 2007 +0200 Prepare for 1.3.0-rc3 release Signed-off-by: Wolfgang Denk <wd@denx.de>commit 68f14f77ca5fe5f9cc025c8cae101671f628309fAuthor: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>Date: Sat Sep 29 13:41:37 2007 +0200 Fix warning differ in signedness in cpu/pxa/mmc.c Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>commit fc19e36f741e8bc727c0a330170b3b5db90399efAuthor: Wolfgang Denk <wd@denx.de>Date: Sat Oct 13 23:51:14 2007 +0200 Fix warning differ in signedness in board/mpl/vcma9/vcma9.c Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>commit de74b9eeacccaf0a42e5ecc9ae79a88f7a311296Author: Wolfgang Denk <wd@denx.de>Date: Sat Oct 13 21:15:39 2007 +0200 Coding Style cleanup. Signed-off-by: Wolfgang Denk <wd@denx.de>commit e1893815b0999410d7a327589611c7b38e95299eAuthor: Wolfgang Denk <wd@denx.de>Date: Fri Oct 12 15:49:39 2007 +0200 GP3 SSA: enable RTC Signed-off-by: Wolfgang Denk <wd@denx.de>commit 8002012041f1ff9f997a5727abe5015f70cd2e46Author: Grzegorz Bernacki <gjb@semihalf.com>Date: Tue Oct 9 13:58:24 2007 +0200 [ads5121] EEPROM support added. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>commit 7b624ad254b97e5a25dca2304a398b64aeedaffeAuthor: Haavard Skinnemoen <hskinnemoen@atmel.com>Date: Sat Oct 6 18:55:35 2007 +0200 AVR32: Initialize bi_flash* in board_init_r The ATSTK1000-specific flash driver intializes bi_flashstart, bi_flashsize and bi_flashoffset, but other flash drivers, like the CFI driver, don't. Initialize these in board_init_r instead so that things will still be set up correctly when we switch to the CFI driver. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>commit 2b2a587d6d3076387d22ac740f44044bf46e2cb8Author: Marian Balakowicz <m8@semihalf.com>Date: Fri Oct 5 10:40:54 2007 +0200 tqm5200: Fix CONFIG_CMD_PCI typo in board config file. Signed-off-by: Marian Balakowicz <m8@semihalf.com>commit 92869195ef8210758d2176230c0a36897afd50edAuthor: Bartlomiej Sieka <tur@semihalf.com>Date: Fri Oct 5 09:46:06 2007 +0200 CM5200: Fix missing null-termination in hostname manipulation code Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>commit 9add9884b1fddc34ca186e00a2f868ccd5d02d87Author: Haavard Skinnemoen <hskinnemoen@atmel.com>Date: Tue Oct 2 19:09:01 2007 +0200 Fix memtest breakage CFG_MEMTEST_START uses weird magic involving gd, which fails to compile. Use hardcoded values instead (we actually know how much RAM we have on board.) Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>commit 738815c0cc44aa329097f868dc1efc49ede9c5baAuthor: Stefan Roese <sr@denx.de>Date: Tue Oct 2 11:44:46 2007 +0200 ppc4xx: Coding style cleanup Signed-off-by: Stefan Roese <sr@denx.de>commit 87c1833a39e944db66385286fd5e28f9b3fcdd50Author: Stefan Roese <sr@denx.de>Date: Tue Oct 2 11:44:19 2007 +0200 ppc4xx: lwmon5: Remove watchdog for now, since not fully tested yet Signed-off-by: Stefan Roese <sr@denx.de>commit 2db64784061bfc34f4ba70ef1d2fbe7133b55670Author: Grzegorz Bernacki <gjb@semihalf.com>Date: Mon Oct 1 09:51:50 2007 +0200 Program EPLD to force full duplex mode for PHY. EPLD forces modes of PHY operation. By default full duplex is turned off. This fix turns it on. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>commit 785c13477b77dcd2e6c5128fffcdb4e1943f4818Author: Timo Ketola <timo.ketola@exertus.fi>Date: Mon Sep 24 14:50:32 2007 +0300 Bugfix: Use only one PTD for one endpoint Original isp116x-hcd code prepared multiple PTDs for longer than 16 byte transfers for one endpoint. That is unnecessary because the ISP116x is able to split long data from one PTD into multiple transactions based on the buffer size of the endpoint. It also caused serious problems if the endpoint NAKed some of the transactions. In that case ISP116x wouldn't notice that the other PTDs were for the same endpoint and would try the other PTDs possibly out of order. That would break the whole transfer. This patch makes isp116x_submit_job to use one PTD for one transfer. Signed-off-by: Timo Ketola <timo.ketola@exertus.fi> Signed-off-by: Markus Klotzbuecher <mk@denx.de>commit 86ec86c04326c3913178a7679aa910de071da75dAuthor: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>Date: Thu Sep 27 23:27:47 2007 +0200 Fix missing DECLARE_GLOBAL_DATA_PTR on CONFIG_LPC2292 in serial Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>commit 3e954beb614b5b190d7f4f4c3b641437a0132e35Author: Stefan Roese <sr@denx.de>Date: Tue Sep 11 14:12:55 2007 +0200 ppc4xx: lwmon5: Change GPIO 58 to default to low (watchdog test) Signed-off-by: Stefan Roese <sr@denx.de>commit 1487adbdcf9594bb2eb686325a6f9540dad1b70aAuthor: Ed Swarthout <Ed.Swarthout@freescale.com>Date: Wed Sep 26 16:35:54 2007 -0500 85xx io out functions need sync after write. This fixes the mc146818 rtc_read/write functions for 85xx. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>commit 0d38effc6e359e6b1b0c78d66e8bc1a4dc15a2aeAuthor: Grant Likely <grant.likely@secretlab.ca>Date: Tue
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