vecnum.h
来自「U-boot源码 ARM7启动代码」· C头文件 代码 · 共 300 行 · 第 1/2 页
H
300 行
#define VECNUM_ETH0 (32 + 28) /* Ethernet interrupt status */#define VECNUM_EWU0 (32 + 29) /* Emac wakeup *//* UIC 2 */#define VECNUM_EIR5 (62 + 24) /* External interrupt 5 */#define VECNUM_EIR4 (62 + 25) /* External interrupt 4 */#define VECNUM_EIR3 (62 + 26) /* External interrupt 3 */#define VECNUM_EIR2 (62 + 27) /* External interrupt 2 */#define VECNUM_EIR1 (62 + 28) /* External interrupt 1 */#define VECNUM_EIR0 (62 + 29) /* External interrupt 0 */#elif defined(CONFIG_440SP)/* UIC 0 */#define VECNUM_U0 0 /* UART0 */#define VECNUM_U1 1 /* UART1 */#define VECNUM_IIC0 2 /* IIC0 */#define VECNUM_IIC1 3 /* IIC1 */#define VECNUM_PIM 4 /* PCI inbound message */#define VECNUM_PCRW 5 /* PCI command reg write */#define VECNUM_PPM 6 /* PCI power management */#define VECNUM_UIC1NC 30 /* UIC1 non-critical interrupt */#define VECNUM_UIC1C 31 /* UIC1 critical interrupt *//* UIC 1 */#define VECNUM_EIR0 (32 + 0) /* External interrupt 0 */#define VECNUM_MS (32 + 1) /* MAL SERR */#define VECNUM_TXDE (32 + 2) /* MAL TXDE */#define VECNUM_RXDE (32 + 3) /* MAL RXDE */#define VECNUM_MTE (32 + 6) /* MAL Tx EOB */#define VECNUM_MRE (32 + 7) /* MAL Rx EOB */#define VECNUM_CT0 (32 + 12) /* GPT compare timer 0 */#define VECNUM_CT1 (32 + 13) /* GPT compare timer 1 */#define VECNUM_CT2 (32 + 14) /* GPT compare timer 2 */#define VECNUM_CT3 (32 + 15) /* GPT compare timer 3 */#define VECNUM_CT4 (32 + 16) /* GPT compare timer 4 */#define VECNUM_ETH0 (32 + 28) /* Ethernet interrupt status */#define VECNUM_EWU0 (32 + 29) /* Emac wakeup */#elif defined(CONFIG_440)/* UIC 0 */#define VECNUM_U0 0 /* UART0 */#define VECNUM_U1 1 /* UART1 */#define VECNUM_IIC0 2 /* IIC0 */#define VECNUM_IIC1 3 /* IIC1 */#define VECNUM_PIM 4 /* PCI inbound message */#define VECNUM_PCRW 5 /* PCI command reg write */#define VECNUM_PPM 6 /* PCI power management */#define VECNUM_MSI0 7 /* PCI MSI level 0 */#define VECNUM_MSI1 8 /* PCI MSI level 0 */#define VECNUM_MSI2 9 /* PCI MSI level 0 */#define VECNUM_MTE 10 /* MAL TXEOB */#define VECNUM_MRE 11 /* MAL RXEOB */#define VECNUM_D0 12 /* DMA channel 0 */#define VECNUM_D1 13 /* DMA channel 1 */#define VECNUM_D2 14 /* DMA channel 2 */#define VECNUM_D3 15 /* DMA channel 3 */#define VECNUM_CT0 18 /* GPT compare timer 0 */#define VECNUM_CT1 19 /* GPT compare timer 1 */#define VECNUM_CT2 20 /* GPT compare timer 2 */#define VECNUM_CT3 21 /* GPT compare timer 3 */#define VECNUM_CT4 22 /* GPT compare timer 4 */#define VECNUM_EIR0 23 /* External interrupt 0 */#define VECNUM_EIR1 24 /* External interrupt 1 */#define VECNUM_EIR2 25 /* External interrupt 2 */#define VECNUM_EIR3 26 /* External interrupt 3 */#define VECNUM_EIR4 27 /* External interrupt 4 */#define VECNUM_EIR5 28 /* External interrupt 5 */#define VECNUM_EIR6 29 /* External interrupt 6 */#define VECNUM_UIC1NC 30 /* UIC1 non-critical interrupt */#define VECNUM_UIC1C 31 /* UIC1 critical interrupt *//* UIC 1 */#define VECNUM_MS (32 + 0 ) /* MAL SERR */#define VECNUM_TXDE (32 + 1 ) /* MAL TXDE */#define VECNUM_RXDE (32 + 2 ) /* MAL RXDE */#define VECNUM_USBDEV (32 + 23) /* USB 1.1/USB 2.0 Device */#define VECNUM_ETH0 (32 + 28) /* Ethernet 0 interrupt status */#define VECNUM_EWU0 (32 + 29) /* Ethernet 0 wakeup */#else /* !defined(CONFIG_440) */#if defined(CONFIG_405EZ)#define VECNUM_D0 0 /* DMA channel 0 */#define VECNUM_D1 1 /* DMA channel 1 */#define VECNUM_D2 2 /* DMA channel 2 */#define VECNUM_D3 3 /* DMA channel 3 */#define VECNUM_1588 4 /* IEEE 1588 network synchronization */#define VECNUM_U0 5 /* UART0 */#define VECNUM_U1 6 /* UART1 */#define VECNUM_CAN0 7 /* CAN 0 */#define VECNUM_CAN1 8 /* CAN 1 */#define VECNUM_SPI 9 /* SPI */#define VECNUM_IIC0 10 /* I2C */#define VECNUM_CHT0 11 /* Chameleon timer high pri interrupt */#define VECNUM_CHT1 12 /* Chameleon timer high pri interrupt */#define VECNUM_USBH1 13 /* USB Host 1 */#define VECNUM_USBH2 14 /* USB Host 2 */#define VECNUM_USBDEV 15 /* USB Device */#define VECNUM_ETH0 16 /* 10/100 Ethernet interrupt status */#define VECNUM_EWU0 17 /* Ethernet wakeup sequence detected */#define VECNUM_MADMAL 18 /* Logical OR of following MadMAL int */#define VECNUM_MS 18 /* MAL_SERR_INT */#define VECNUM_TXDE 18 /* MAL_TXDE_INT */#define VECNUM_RXDE 18 /* MAL_RXDE_INT */#define VECNUM_MTE 19 /* MAL TXEOB */#define VECNUM_MTE1 20 /* MAL TXEOB1 */#define VECNUM_MRE 21 /* MAL RXEOB */#define VECNUM_NAND 22 /* NAND Flash controller */#define VECNUM_ADC 23 /* ADC */#define VECNUM_DAC 24 /* DAC */#define VECNUM_OPB2PLB 25 /* OPB to PLB bridge interrupt */#define VECNUM_RESERVED0 26 /* Reserved */#define VECNUM_EIR0 27 /* External interrupt 0 */#define VECNUM_EIR1 28 /* External interrupt 1 */#define VECNUM_EIR2 29 /* External interrupt 2 */#define VECNUM_EIR3 30 /* External interrupt 3 */#define VECNUM_EIR4 31 /* External interrupt 4 */#else /* !CONFIG_405EZ */#define VECNUM_U0 0 /* UART0 */#define VECNUM_U1 1 /* UART1 */#define VECNUM_D0 5 /* DMA channel 0 */#define VECNUM_D1 6 /* DMA channel 1 */#define VECNUM_D2 7 /* DMA channel 2 */#define VECNUM_D3 8 /* DMA channel 3 */#define VECNUM_EWU0 9 /* Ethernet wakeup */#define VECNUM_MS 10 /* MAL SERR */#define VECNUM_MTE 11 /* MAL TXEOB */#define VECNUM_MRE 12 /* MAL RXEOB */#define VECNUM_TXDE 13 /* MAL TXDE */#define VECNUM_RXDE 14 /* MAL RXDE */#define VECNUM_ETH0 15 /* Ethernet interrupt status */#define VECNUM_EIR0 25 /* External interrupt 0 */#define VECNUM_EIR1 26 /* External interrupt 1 */#define VECNUM_EIR2 27 /* External interrupt 2 */#define VECNUM_EIR3 28 /* External interrupt 3 */#define VECNUM_EIR4 29 /* External interrupt 4 */#define VECNUM_EIR5 30 /* External interrupt 5 */#define VECNUM_EIR6 31 /* External interrupt 6 */#endif /* defined(CONFIG_405EZ) */#endif /* defined(CONFIG_440) */#endif /* _VECNUMS_H_ */⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?