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📄 sc3.h

📁 U-boot源码 ARM7启动代码
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/* * (C) Copyright 2007 * Heiko Schocher, DENX Software Engineering, <hs@denx.de>. * * From: * (C) Copyright 2003 * Juergen Beisert, EuroDesign embedded technologies, jbeisert@eurodsn.de * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */#ifndef __CONFIG_H#define __CONFIG_H#undef USE_VGA_GRAPHICS/* Memory Map * 0x00000000 .... 0x03FFFFFF -> RAM (up to 128MiB) * 0x74000000 .... 0x740FFFFF -> CS#6 * 0x74100000 .... 0x741FFFFF -> CS#7 * 0x74200000 .... 0x742FFFFF -> CS4# if no internal USB * 0x74300000 .... 0x743FFFFF -> CS5# if no boosted IDE * 0x77C00000 .... 0x77CFFFFF -> CS4# USB HC (1 MiB) * 0x77D00000 .... 0x77DFFFFF -> CS1# NAND-Flash (1 MiB) * 0x78000000 .... 0x78FFFFFF -> CS2# ISA-Bus Speicherzugriff (16 MiB) * 0x79000000 .... 0x7900FFFF -> CS2# ISA-Bus IO-Zugriff (16 MiB, mapped: 64kiB) * 0x79010000 .... 0x79FFFFFF -> CS2# ISA-Bus IO-Zugriff (mirrored) * 0x7A000000 .... 0x7A0FFFFF -> CS5# IDE emulation (1MiB) * * 0x80000000 .... 0x9FFFFFFF -> PCI-Bus Speicherzugriff (512MiB, mapped: 1:1) * 0xA0000000 .... 0xBFFFFFFF -> PCI-Bus Speicherzugriff (512MiB, mapped: 0x00000000...0x1FFFFFFF) * 0xE8000000 .... 0xE800FFFF -> PCI-Bus IO-Zugriff (64kiB, translated to PCI: 0x0000...0xFFFF) * 0xE8800000 .... 0xEBFFFFFF -> PCI-Bus IO-Zugriff (56MiB, translated to PCI: 0x00800000...0x3FFFFFF) * 0xEED00000 .... 0xEED00003 -> PCI-Bus * 0xEF400000 .... 0xEF40003F -> PCI-Bus Local Configuration Registers * 0xEF40003F .... 0xEF5FFFFF -> reserved * 0xEF600000 .... 0xEFFFFFFF -> 405GP internal Devices (10 MiB) * 0xF0000000 .... 0xF01FFFFF -> Flash-ROM (2 MiB) * 0xF0200000 .... 0xF7FFFFFF -> free for flash devices * 0xF8000000 .... 0xF8000FFF -> OnChipMemory (4kiB) * 0xF8001000 .... 0xFFDFFFFF -> free for flash devices * 0xFFE00000 .... 0xFFFFFFFF -> BOOT-ROM (2 MiB) */#define CONFIG_SC3	1#define CONFIG_4xx	1#define CONFIG_405GP	1#define CONFIG_BOARD_EARLY_INIT_F	1/* * Define IDE_USES_ISA_EMULATION for slower IDE access in the ISA-IO address range * If undefined, IDE access uses a seperat emulation with higher access speed. * Consider to inform your Linux IDE driver about the different addresses! * IDE_USES_ISA_EMULATION is only used if you define CONFIG_CMD_IDE! */#define IDE_USES_ISA_EMULATION/*----------------------------------------------------------------------- * Serial Port *----------------------------------------------------------------------*/#define CONFIG_SERIAL_MULTI#undef CONFIG_SERIAL_SOFTWARE_FIFO/* * define CONFIG_POWER_DOWN if your cpu should power down while waiting for your input * Works only, if you have enabled the CONFIG_SERIAL_SOFTWARE_FIFO feature */#if CONFIG_SERIAL_SOFTWARE_FIFO #define CONFIG_POWER_DOWN#endif/* * define CONFIG_SYS_CLK_FREQ to your base crystal clock in Hz */#define CONFIG_SYS_CLK_FREQ	33333333/* * define CONFIG_BAUDRATE to the baudrate value you want to use as default */#define CONFIG_BAUDRATE		115200#define CONFIG_BOOTDELAY	3 /* autoboot after 3 seconds	      */#define CONFIG_PREBOOT	"echo;"	\	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \	"echo"#undef	CONFIG_BOOTARGS#define	CONFIG_EXTRA_ENV_SETTINGS					\	"netdev=eth0\0"							\	"nfsargs=setenv bootargs root=/dev/nfs rw "			\		"nfsroot=${serverip}:${rootpath}\0"			\	"ramargs=setenv bootargs root=/dev/ram rw\0"			\	"nand_args=setenv bootargs root=/dev/mtdblock5 rw"		\		"rootfstype=jffs2\0"					\	"addip=setenv bootargs ${bootargs} "				\		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\		":${hostname}:${netdev}:off panic=1\0"			\	"addcons=setenv bootargs ${bootargs} "				\		"console=ttyS0,${baudrate}\0"				\	"flash_nfs=run nfsargs addip addcons;"				\		"bootm ${kernel_addr}\0"				\	"flash_nand=run nand_args addip addcons;bootm ${kernel_addr}\0"	\	"net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;"	\		"bootm\0"						\	"rootpath=/opt/eldk/ppc_4xx\0"					\	"bootfile=/tftpboot/sc3/uImage\0"				\	"u-boot=/tftpboot/sc3/u-boot.bin\0"				\	"setup=tftp 200000 /tftpboot/sc3/setup.img;autoscr 200000\0"	\	"kernel_addr=FFE08000\0"					\	""#undef CONFIG_BOOTCOMMAND#define CONFIG_SILENT_CONSOLE	1	/* enable silent startup */#define CFG_DEVICE_NULLDEV	1	/* include nulldev device	*/#if 1	/* feel free to disable for development */#define CONFIG_AUTOBOOT_KEYED		/* Enable password protection	*/#define CONFIG_AUTOBOOT_PROMPT		"\nSC3 - booting... stop with ENTER\n"#define CONFIG_AUTOBOOT_DELAY_STR	"\r"	/* 1st "password"	*/#define CONFIG_AUTOBOOT_DELAY_STR2	"\n"	/* 1st "password"	*/#endif/* * define CONFIG_BOOTCOMMAND to the autoboot commands. They will running after * the CONFIG_BOOTDELAY delay to boot your machine */#define CONFIG_BOOTCOMMAND	"bootp;dcache on;bootm"/* * define CONFIG_BOOTARGS to the default kernel parameters. They will used if you don't * set different values at the u-boot prompt */#ifdef USE_VGA_GRAPHICS #define CONFIG_BOOTARGS	"root=/dev/nfs rw ip=bootp nfsroot=/tftpboot/solidcard3re"#else #define CONFIG_BOOTARGS	"console=ttyS0,115200 root=/dev/nfs rw ip=bootp"#endif/* * Is the USB host controller assembled? If yes define CONFIG_ISP1161_PRESENT * This reserves memory bank #4 for this purpose */#undef CONFIG_ISP1161_PRESENT#undef CONFIG_LOADS_ECHO   /* no echo on for serial download	*/#define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/#define CONFIG_NET_MULTI/* #define CONFIG_EEPRO100_SROM_WRITE *//* #define CONFIG_SHOW_MAC */#define CONFIG_EEPRO100#define CONFIG_MII 1			/* add 405GP MII PHY management		*/#define CONFIG_PHY_ADDR 1	/* the connected Phy defaults to address 1 *//* * BOOTP options */#define CONFIG_BOOTP_BOOTFILESIZE#define CONFIG_BOOTP_BOOTPATH#define CONFIG_BOOTP_GATEWAY#define CONFIG_BOOTP_HOSTNAME/* * Command line configuration. */#include <config_cmd_default.h>#define CONFIG_CMD_AUTOSCRIPT#define CONFIG_CMD_PCI#define CONFIG_CMD_IRQ#define CONFIG_CMD_NET#define CONFIG_CMD_MII#define CONFIG_CMD_PING#define CONFIG_CMD_NAND#define CONFIG_CMD_JFFS2#define CONFIG_CMD_I2C#define CONFIG_CMD_IDE#define CONFIG_CMD_DATE#define CONFIG_CMD_DHCP#define CONFIG_CMD_CACHE#define CONFIG_CMD_ELF#undef CONFIG_WATCHDOG			/* watchdog disabled		*//* * Miscellaneous configurable options */#define CFG_LONGHELP	1		/* undef to save memory		*/#define CFG_PROMPT	"SC3> "	/* Monitor Command Prompt	*/#define	CFG_CBSIZE	256		/* Console I/O Buffer Size	*/#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */#define CFG_MAXARGS	16		/* max number of command args	*/#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/#define CFG_MEMTEST_START	0x0400000	/* memtest works on	*/#define CFG_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*//* * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1. * If CFG_405_UART_ERRATA_59, then UART divisor is 31. * Otherwise, UART divisor is determined by CPU Clock and CFG_BASE_BAUD value. * The Linux BASE_BAUD define should match this configuration. *    baseBaud = cpuClock/(uartDivisor*16) * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock, * set Linux BASE_BAUD to 403200. * * Consider the OPB clock! If it get lower the BASE_BAUD must be lower to * (see 405GP datasheet for descritpion) */#undef	CFG_EXT_SERIAL_CLOCK		/* external serial clock */#undef	CFG_405_UART_ERRATA_59		/* 405GP/CR Rev. D silicon */#define CFG_BASE_BAUD		921600	/* internal clock *//* The following table includes the supported baudrates */#define CFG_BAUDRATE_TABLE  \    {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}#define CFG_LOAD_ADDR		0x1000000	/* default load address */#define CFG_EXTBDINFO		1	/* To use extended board_into (bd_t) */#define	CFG_HZ			1000	/* decrementer freq: 1 ms ticks	*//*----------------------------------------------------------------------- * IIC stuff *----------------------------------------------------------------------- */#define  CONFIG_HARD_I2C		/* I2C with hardware support	*/#undef	CONFIG_SOFT_I2C			/* I2C bit-banged		*/#define I2C_INIT#define I2C_ACTIVE 0#define I2C_TRISTATE 0#define CFG_I2C_SPEED		100000	/* use the standard 100kHz speed */#define CFG_I2C_SLAVE		0x7F		/* mask valid bits */#define CONFIG_RTC_DS1337#define CFG_I2C_RTC_ADDR 0x68/*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- */#define PCI_HOST_ADAPTER 0		/* configure ar pci adapter	*/#define PCI_HOST_FORCE	1		/* configure as pci host	*/#define PCI_HOST_AUTO	2		/* detected via arbiter enable	*/#define CONFIG_PCI			/* include pci support		*/#define CONFIG_PCI_HOST	PCI_HOST_FORCE	/* select pci host function	*/#define CONFIG_PCI_PNP			/* do pci plug-and-play		*/					/* resource configuration	*//* If you want to see, whats connected to your PCI bus *//* #define CONFIG_PCI_SCAN_SHOW */#define CFG_PCI_SUBSYS_VENDORID 0x0000	/* PCI Vendor ID: to-do!!!	*/#define CFG_PCI_SUBSYS_DEVICEID 0x0000	/* PCI Device ID: to-do!!!	*/#define CFG_PCI_PTM1LA	0x00000000	/* point to sdram		*/#define CFG_PCI_PTM1MS	0x80000001	/* 2GB, enable hard-wired to 1	*/#define CFG_PCI_PTM1PCI 0x00000000	/* Host: use this pci address	*/#define CFG_PCI_PTM2LA	0x00000000	/* disabled			*/#define CFG_PCI_PTM2MS	0x00000000	/* disabled			*/#define CFG_PCI_PTM2PCI 0x04000000	/* Host: use this pci address	*//*----------------------------------------------------------------------- * External peripheral base address *----------------------------------------------------------------------- */#if !defined(CONFIG_CMD_IDE)#undef	CONFIG_IDE_LED			/* no led for ide supported	*/#undef	CONFIG_IDE_RESET		/* no reset for ide supported	*//*----------------------------------------------------------------------- * IDE/ATA stuff *----------------------------------------------------------------------- */#else#define CONFIG_START_IDE	1	/* check, if use IDE */

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