📄 isp116x.h
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#define LOG2_PERIODIC_SIZE 5 /* arbitrary; this matches OHCI */#define PERIODIC_SIZE (1 << LOG2_PERIODIC_SIZE)/* Philips transfer descriptor */struct ptd { u16 count;#define PTD_COUNT_MSK (0x3ff << 0)#define PTD_TOGGLE_MSK (1 << 10)#define PTD_ACTIVE_MSK (1 << 11)#define PTD_CC_MSK (0xf << 12) u16 mps;#define PTD_MPS_MSK (0x3ff << 0)#define PTD_SPD_MSK (1 << 10)#define PTD_LAST_MSK (1 << 11)#define PTD_EP_MSK (0xf << 12) u16 len;#define PTD_LEN_MSK (0x3ff << 0)#define PTD_DIR_MSK (3 << 10)#define PTD_DIR_SETUP (0)#define PTD_DIR_OUT (1)#define PTD_DIR_IN (2)#define PTD_B5_5_MSK (1 << 13) u16 faddr;#define PTD_FA_MSK (0x7f << 0)#define PTD_FMT_MSK (1 << 7)} __attribute__ ((packed, aligned(2)));struct isp116x_ep { struct usb_device *udev; struct ptd ptd; u8 maxpacket; u8 epnum; u8 nextpid; u16 length; /* of current packet */ unsigned char *data; /* to databuf */ u16 error_count;};/* URB struct */#define N_URB_TD 48#define URB_DEL 1typedef struct { struct isp116x_ep *ed; void *transfer_buffer; /* (in) associated data buffer */ int actual_length; /* (return) actual transfer length */ unsigned long pipe; /* (in) pipe information */#if 0 int state;#endif} urb_priv_t;struct isp116x_platform_data { /* Enable internal resistors on downstream ports */ unsigned sel15Kres:1; /* On-chip overcurrent detection */ unsigned oc_enable:1; /* Enable wakeup by devices on usb bus (e.g. wakeup by attachment/detachment or by device activity such as moving a mouse). When chosen, this option prevents stopping internal clock, increasing thereby power consumption in suspended state. */ unsigned remote_wakeup_enable:1;};struct isp116x { u16 *addr_reg; u16 *data_reg; struct isp116x_platform_data *board; struct dentry *dentry; unsigned long stat1, stat2, stat4, stat8, stat16; /* Status flags */ unsigned disabled:1; unsigned sleeping:1; /* Root hub registers */ u32 rhdesca; u32 rhdescb; u32 rhstatus; u32 rhport[2]; /* Schedule for the current frame */ struct isp116x_ep *atl_active; int atl_buflen; int atl_bufshrt; int atl_last_dir; int atl_finishing;};/* ------------------------------------------------- *//* Inter-io delay (ns). The chip is picky about access timings; it * expects at least: * 150ns delay between consecutive accesses to DATA_REG, * 300ns delay between access to ADDR_REG and DATA_REG * OE, WE MUST NOT be changed during these intervals */#if defined(UDELAY)#define isp116x_delay(h,d) udelay(d)#else#define isp116x_delay(h,d) do {} while (0)#endifstatic inline void isp116x_write_addr(struct isp116x *isp116x, unsigned reg){ writew(reg & 0xff, isp116x->addr_reg); isp116x_delay(isp116x, UDELAY);}static inline void isp116x_write_data16(struct isp116x *isp116x, u16 val){ writew(val, isp116x->data_reg); isp116x_delay(isp116x, UDELAY);}static inline void isp116x_raw_write_data16(struct isp116x *isp116x, u16 val){ __raw_writew(val, isp116x->data_reg); isp116x_delay(isp116x, UDELAY);}static inline u16 isp116x_read_data16(struct isp116x *isp116x){ u16 val; val = readw(isp116x->data_reg); isp116x_delay(isp116x, UDELAY); return val;}static inline u16 isp116x_raw_read_data16(struct isp116x *isp116x){ u16 val; val = __raw_readw(isp116x->data_reg); isp116x_delay(isp116x, UDELAY); return val;}static inline void isp116x_write_data32(struct isp116x *isp116x, u32 val){ writew(val & 0xffff, isp116x->data_reg); isp116x_delay(isp116x, UDELAY); writew(val >> 16, isp116x->data_reg); isp116x_delay(isp116x, UDELAY);}static inline u32 isp116x_read_data32(struct isp116x *isp116x){ u32 val; val = (u32) readw(isp116x->data_reg); isp116x_delay(isp116x, UDELAY); val |= ((u32) readw(isp116x->data_reg)) << 16; isp116x_delay(isp116x, UDELAY); return val;}/* Let's keep register access functions out of line. Hint: we wait at least 150 ns at every access.*/static u16 isp116x_read_reg16(struct isp116x *isp116x, unsigned reg){ isp116x_write_addr(isp116x, reg); return isp116x_read_data16(isp116x);}static u32 isp116x_read_reg32(struct isp116x *isp116x, unsigned reg){ isp116x_write_addr(isp116x, reg); return isp116x_read_data32(isp116x);}static void isp116x_write_reg16(struct isp116x *isp116x, unsigned reg, unsigned val){ isp116x_write_addr(isp116x, reg | ISP116x_WRITE_OFFSET); isp116x_write_data16(isp116x, (u16) (val & 0xffff));}static void isp116x_write_reg32(struct isp116x *isp116x, unsigned reg, unsigned val){ isp116x_write_addr(isp116x, reg | ISP116x_WRITE_OFFSET); isp116x_write_data32(isp116x, (u32) val);}/* --- USB HUB constants (not OHCI-specific; see hub.h) -------------------- *//* destination of request */#define RH_INTERFACE 0x01#define RH_ENDPOINT 0x02#define RH_OTHER 0x03#define RH_CLASS 0x20#define RH_VENDOR 0x40/* Requests: bRequest << 8 | bmRequestType */#define RH_GET_STATUS 0x0080#define RH_CLEAR_FEATURE 0x0100#define RH_SET_FEATURE 0x0300#define RH_SET_ADDRESS 0x0500#define RH_GET_DESCRIPTOR 0x0680#define RH_SET_DESCRIPTOR 0x0700#define RH_GET_CONFIGURATION 0x0880#define RH_SET_CONFIGURATION 0x0900#define RH_GET_STATE 0x0280#define RH_GET_INTERFACE 0x0A80#define RH_SET_INTERFACE 0x0B00#define RH_SYNC_FRAME 0x0C80/* Our Vendor Specific Request */#define RH_SET_EP 0x2000/* Hub port features */#define RH_PORT_CONNECTION 0x00#define RH_PORT_ENABLE 0x01#define RH_PORT_SUSPEND 0x02#define RH_PORT_OVER_CURRENT 0x03#define RH_PORT_RESET 0x04#define RH_PORT_POWER 0x08#define RH_PORT_LOW_SPEED 0x09#define RH_C_PORT_CONNECTION 0x10#define RH_C_PORT_ENABLE 0x11#define RH_C_PORT_SUSPEND 0x12#define RH_C_PORT_OVER_CURRENT 0x13#define RH_C_PORT_RESET 0x14/* Hub features */#define RH_C_HUB_LOCAL_POWER 0x00#define RH_C_HUB_OVER_CURRENT 0x01#define RH_DEVICE_REMOTE_WAKEUP 0x00#define RH_ENDPOINT_STALL 0x01#define RH_ACK 0x01#define RH_REQ_ERR -1#define RH_NACK 0x00
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