full_featured.tan.qmsg

基于Nios II的汽车智能防盗导航系统核心作为嵌入式系统发展趋势

{ "Info" "ITAN_NO_REG2REG_EXIST" "PLD_CLKFB " "Info: No valid register-to-register data paths exist for clock \"PLD_CLKFB\"" {  } {  } 0}
{ "Info" "ITDB_FULL_SLACK_RESULT" "PLD_CLOCKINPUT\[1\] register delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|safe_q\[5\] register delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|safe_q\[0\] 15.942 ns " "Info: Slack time is 15.942 ns for clock \"PLD_CLOCKINPUT\[1\]\" between source register \"delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|safe_q\[5\]\" and destination register \"delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|safe_q\[0\]\"" { { "Info" "ITDB_SIMPLE_FMAX_RESULT" "246.43 MHz 4.058 ns " "Info: Fmax is 246.43 MHz (period= 4.058 ns)" {  } {  } 0} { "Info" "ITDB_FULL_P2P_REQUIREMENT_RESULT" "19.767 ns + Largest register register " "Info: + Largest register to register requirement is 19.767 ns" { { "Info" "ITDB_FULL_SETUP_REQUIREMENT" "20.000 ns + " "Info: + Setup relationship between source and destination is 20.000 ns" { { "Info" "ITDB_EDGE_RESULT" "+ Latch 20.000 ns " "Info: + Latch edge is 20.000 ns" { { "Info" "ITDB_CLOCK_SETTING_RESULT" "Destination PLD_CLOCKINPUT\[1\] 20.000 ns 0.000 ns  50 " "Info: Clock period of Destination clock \"PLD_CLOCKINPUT\[1\]\" is 20.000 ns with  offset of 0.000 ns and duty cycle of 50" {  } {  } 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Destination Setup 1 " "Info: Multicycle Setup factor for Destination register is 1" {  } {  } 0}  } {  } 0} { "Info" "ITDB_EDGE_RESULT" "- Launch 0.000 ns " "Info: - Launch edge is 0.000 ns" { { "Info" "ITDB_CLOCK_SETTING_RESULT" "Source PLD_CLOCKINPUT\[1\] 20.000 ns 0.000 ns  50 " "Info: Clock period of Source clock \"PLD_CLOCKINPUT\[1\]\" is 20.000 ns with  offset of 0.000 ns and duty cycle of 50" {  } {  } 0} { "Info" "ITDB_CLOCK_OFFSET_COMPONENTS" "Source 0.000 ns 0 degrees " "Info: Clock offset from Source is based on specified offset of 0.000 ns and phase shift of 0 degrees of the base clock" {  } {  } 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Source Setup 1 " "Info: Multicycle Setup factor for Source register is 1" {  } {  } 0} { "Info" "ITDB_CLOCK_OFFSET_COMPONENTS" "Destination 0.000 ns 0 degrees " "Info: Clock offset from Destination is based on specified offset of 0.000 ns and phase shift of 0 degrees of the base clock" {  } {  } 0}  } {  } 0} { "Info" "ITDB_SETUP_UNCERTAINTY" "0.000 ns " "Info: Clock setup uncertainty between source and destination is 0.000 ns" {  } {  } 0}  } {  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.002 ns + Largest " "Info: + Largest clock skew is -0.002 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "PLD_CLOCKINPUT\[1\] destination 2.846 ns + Shortest register " "Info: + Shortest clock path from clock \"PLD_CLOCKINPUT\[1\]\" to destination register is 2.846 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.299 ns) 1.299 ns PLD_CLOCKINPUT\[1\] 1 CLK PIN_K5 12 " "Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_K5; Fanout = 12; CLK Node = 'PLD_CLOCKINPUT\[1\]'" {  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "" { PLD_CLOCKINPUT[1] } "NODE_NAME" } "" } } { "full_featured.bdf" "" { Schematic "F:/workspace/r_08_20/our_hardware_project/full_featured.bdf" { { 376 312 480 392 "PLD_CLOCKINPUT\[1\]" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.918 ns) + CELL(0.629 ns) 2.846 ns delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|safe_q\[0\] 2 REG LC_X17_Y24_N5 3 " "Info: 2: + IC(0.918 ns) + CELL(0.629 ns) = 2.846 ns; Loc. = LC_X17_Y24_N5; Fanout = 3; REG Node = 'delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|safe_q\[0\]'" {  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "1.547 ns" { PLD_CLOCKINPUT[1] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } "NODE_NAME" } "" } } { "db/cntr_df8.tdf" "" { Text "F:/workspace/r_08_20/our_hardware_project/db/cntr_df8.tdf" 133 8 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.928 ns 67.74 % " "Info: Total cell delay = 1.928 ns ( 67.74 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.918 ns 32.26 % " "Info: Total interconnect delay = 0.918 ns ( 32.26 % )" {  } {  } 0}  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "2.846 ns" { PLD_CLOCKINPUT[1] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } "NODE_NAME" } "" } } { "e:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/bin/Technology_Viewer.qrui" "2.846 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } { 0.000ns 0.000ns 0.918ns } { 0.000ns 1.299ns 0.629ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "PLD_CLOCKINPUT\[1\] source 2.848 ns - Longest register " "Info: - Longest clock path from clock \"PLD_CLOCKINPUT\[1\]\" to source register is 2.848 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.299 ns) 1.299 ns PLD_CLOCKINPUT\[1\] 1 CLK PIN_K5 12 " "Info: 1: + IC(0.000 ns) + CELL(1.299 ns) = 1.299 ns; Loc. = PIN_K5; Fanout = 12; CLK Node = 'PLD_CLOCKINPUT\[1\]'" {  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "" { PLD_CLOCKINPUT[1] } "NODE_NAME" } "" } } { "full_featured.bdf" "" { Schematic "F:/workspace/r_08_20/our_hardware_project/full_featured.bdf" { { 376 312 480 392 "PLD_CLOCKINPUT\[1\]" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.920 ns) + CELL(0.629 ns) 2.848 ns delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|safe_q\[5\] 2 REG LC_X17_Y23_N0 3 " "Info: 2: + IC(0.920 ns) + CELL(0.629 ns) = 2.848 ns; Loc. = LC_X17_Y23_N0; Fanout = 3; REG Node = 'delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|safe_q\[5\]'" {  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "1.549 ns" { PLD_CLOCKINPUT[1] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] } "NODE_NAME" } "" } } { "db/cntr_df8.tdf" "" { Text "F:/workspace/r_08_20/our_hardware_project/db/cntr_df8.tdf" 133 8 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.928 ns 67.70 % " "Info: Total cell delay = 1.928 ns ( 67.70 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.920 ns 32.30 % " "Info: Total interconnect delay = 0.920 ns ( 32.30 % )" {  } {  } 0}  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "2.848 ns" { PLD_CLOCKINPUT[1] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] } "NODE_NAME" } "" } } { "e:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/bin/Technology_Viewer.qrui" "2.848 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] } { 0.000ns 0.000ns 0.920ns } { 0.000ns 1.299ns 0.629ns } } }  } 0}  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "2.846 ns" { PLD_CLOCKINPUT[1] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } "NODE_NAME" } "" } } { "e:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/bin/Technology_Viewer.qrui" "2.846 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } { 0.000ns 0.000ns 0.918ns } { 0.000ns 1.299ns 0.629ns } } } { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "2.848 ns" { PLD_CLOCKINPUT[1] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] } "NODE_NAME" } "" } } { "e:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/bin/Technology_Viewer.qrui" "2.848 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] } { 0.000ns 0.000ns 0.920ns } { 0.000ns 1.299ns 0.629ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.198 ns - " "Info: - Micro clock to output delay of source is 0.198 ns" {  } { { "db/cntr_df8.tdf" "" { Text "F:/workspace/r_08_20/our_hardware_project/db/cntr_df8.tdf" 133 8 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.033 ns - " "Info: - Micro setup delay of destination is 0.033 ns" {  } { { "db/cntr_df8.tdf" "" { Text "F:/workspace/r_08_20/our_hardware_project/db/cntr_df8.tdf" 133 8 0 } }  } 0}  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "2.846 ns" { PLD_CLOCKINPUT[1] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } "NODE_NAME" } "" } } { "e:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/bin/Technology_Viewer.qrui" "2.846 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } { 0.000ns 0.000ns 0.918ns } { 0.000ns 1.299ns 0.629ns } } } { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "2.848 ns" { PLD_CLOCKINPUT[1] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] } "NODE_NAME" } "" } } { "e:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/bin/Technology_Viewer.qrui" "2.848 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] } { 0.000ns 0.000ns 0.920ns } { 0.000ns 1.299ns 0.629ns } } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.825 ns - Longest register register " "Info: - Longest register to register delay is 3.825 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|safe_q\[5\] 1 REG LC_X17_Y23_N0 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X17_Y23_N0; Fanout = 3; REG Node = 'delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|safe_q\[5\]'" {  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "" { delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] } "NODE_NAME" } "" } } { "db/cntr_df8.tdf" "" { Text "F:/workspace/r_08_20/our_hardware_project/db/cntr_df8.tdf" 133 8 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.663 ns) + CELL(0.499 ns) 1.162 ns delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|counter_cella5~COUT 2 COMB LC_X17_Y23_N0 2 " "Info: 2: + IC(0.663 ns) + CELL(0.499 ns) = 1.162 ns; Loc. = LC_X17_Y23_N0; Fanout = 2; COMB Node = 'delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|counter_cella5~COUT'" {  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "1.162 ns" { delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella5~COUT } "NODE_NAME" } "" } } { "db/cntr_df8.tdf" "" { Text "F:/workspace/r_08_20/our_hardware_project/db/cntr_df8.tdf" 79 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.069 ns) 1.231 ns delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|counter_cella6~COUT 3 COMB LC_X17_Y23_N1 2 " "Info: 3: + IC(0.000 ns) + CELL(0.069 ns) = 1.231 ns; Loc. = LC_X17_Y23_N1; Fanout = 2; COMB Node = 'delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|counter_cella6~COUT'" {  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "0.069 ns" { delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella5~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella6~COUT } "NODE_NAME" } "" } } { "db/cntr_df8.tdf" "" { Text "F:/workspace/r_08_20/our_hardware_project/db/cntr_df8.tdf" 87 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.069 ns) 1.300 ns delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|counter_cella7~COUT 4 COMB LC_X17_Y23_N2 2 " "Info: 4: + IC(0.000 ns) + CELL(0.069 ns) = 1.300 ns; Loc. = LC_X17_Y23_N2; Fanout = 2; COMB Node = 'delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|counter_cella7~COUT'" {  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "0.069 ns" { delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella6~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella7~COUT } "NODE_NAME" } "" } } { "db/cntr_df8.tdf" "" { Text "F:/workspace/r_08_20/our_hardware_project/db/cntr_df8.tdf" 95 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.069 ns) 1.369 ns delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|counter_cella8~COUT 5 COMB LC_X17_Y23_N3 2 " "Info: 5: + IC(0.000 ns) + CELL(0.069 ns) = 1.369 ns; Loc. = LC_X17_Y23_N3; Fanout = 2; COMB Node = 'delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|counter_cella8~COUT'" {  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "0.069 ns" { delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella7~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella8~COUT } "NODE_NAME" } "" } } { "db/cntr_df8.tdf" "" { Text "F:/workspace/r_08_20/our_hardware_project/db/cntr_df8.tdf" 103 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.157 ns) 1.526 ns delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|counter_cella9~COUT 6 COMB LC_X17_Y23_N4 1 " "Info: 6: + IC(0.000 ns) + CELL(0.157 ns) = 1.526 ns; Loc. = LC_X17_Y23_N4; Fanout = 1; COMB Node = 'delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|counter_cella9~COUT'" {  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "0.157 ns" { delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella8~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella9~COUT } "NODE_NAME" } "" } } { "db/cntr_df8.tdf" "" { Text "F:/workspace/r_08_20/our_hardware_project/db/cntr_df8.tdf" 111 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.549 ns) 2.075 ns delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|cout 7 COMB LC_X17_Y23_N5 11 " "Info: 7: + IC(0.000 ns) + CELL(0.549 ns) = 2.075 ns; Loc. = LC_X17_Y23_N5; Fanout = 11; COMB Node = 'delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|cout'" {  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "0.549 ns" { delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella9~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|cout } "NODE_NAME" } "" } } { "db/cntr_df8.tdf" "" { Text "F:/workspace/r_08_20/our_hardware_project/db/cntr_df8.tdf" 167 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.097 ns) + CELL(0.653 ns) 3.825 ns delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|safe_q\[0\] 8 REG LC_X17_Y24_N5 3 " "Info: 8: + IC(1.097 ns) + CELL(0.653 ns) = 3.825 ns; Loc. = LC_X17_Y24_N5; Fanout = 3; REG Node = 'delay_reset_block:inst3\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_df8:auto_generated\|safe_q\[0\]'" {  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "1.750 ns" { delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|cout delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } "NODE_NAME" } "" } } { "db/cntr_df8.tdf" "" { Text "F:/workspace/r_08_20/our_hardware_project/db/cntr_df8.tdf" 133 8 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.065 ns 53.99 % " "Info: Total cell delay = 2.065 ns ( 53.99 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.760 ns 46.01 % " "Info: Total interconnect delay = 1.760 ns ( 46.01 % )" {  } {  } 0}  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "3.825 ns" { delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella5~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella6~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella7~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella8~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella9~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|cout delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } "NODE_NAME" } "" } } { "e:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/bin/Technology_Viewer.qrui" "3.825 ns" { delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella5~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella6~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella7~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella8~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella9~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|cout delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } { 0.000ns 0.663ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.097ns } { 0.000ns 0.499ns 0.069ns 0.069ns 0.069ns 0.157ns 0.549ns 0.653ns } } }  } 0}  } { { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "2.846 ns" { PLD_CLOCKINPUT[1] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } "NODE_NAME" } "" } } { "e:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/bin/Technology_Viewer.qrui" "2.846 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } { 0.000ns 0.000ns 0.918ns } { 0.000ns 1.299ns 0.629ns } } } { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "2.848 ns" { PLD_CLOCKINPUT[1] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] } "NODE_NAME" } "" } } { "e:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/bin/Technology_Viewer.qrui" "2.848 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] } { 0.000ns 0.000ns 0.920ns } { 0.000ns 1.299ns 0.629ns } } } { "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" "" { Report "F:/workspace/r_08_20/our_hardware_project/db/full_featured_cmp.qrpt" Compiler "full_featured" "UNKNOWN" "V1" "F:/workspace/r_08_20/our_hardware_project/db/full_featured.quartus_db" { Floorplan "F:/workspace/r_08_20/our_hardware_project/" "" "3.825 ns" { delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella5~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella6~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella7~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella8~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella9~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|cout delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } "NODE_NAME" } "" } } { "e:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/bin/Technology_Viewer.qrui" "3.825 ns" { delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[5] delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella5~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella6~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella7~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella8~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|counter_cella9~COUT delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|cout delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0] } { 0.000ns 0.663ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.097ns } { 0.000ns 0.499ns 0.069ns 0.069ns 0.069ns 0.157ns 0.549ns 0.653ns } } }  } 0}