📄 full_1c20.ptf
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}
CONSTANT nasys_dcache_line_size
{
value = "4";
comment = "Size in bytes of each dcache line";
}
CONSTANT nasys_dcache_line_size_log2
{
value = "2";
comment = "Log2 size in bytes of each dcache line";
}
}
mainmem_slave = "sdram/s1";
datamem_slave = "sdram/s1";
maincomm_slave = "uart1/s1";
debugcomm_slave = "uart1/s1";
germs_monitor_id = "";
hdl_sim_caches_cleared = "1";
legacy_sdk_support = "0";
allow_full_address_range = "0";
asp_debug = "0";
asp_core_debug = "0";
break_slave_override = "";
break_offset_override = "0x20";
activate_trace = "1";
activate_monitors = "1";
activate_test_end_checker = "0";
clear_x_bits_ld_non_bypass = "1";
remove_hardware_multiplier = "0";
oci_trigger_arming = "1";
illegal_instructions_trap = "0";
include_third_party_debug_port = "0";
hardware_multiply_uses_les = "0";
hardware_multiply_omits_msw = "1";
hardware_multiply_implementation = "0";
hardware_multiply_implementation_dsp_blocks = "0";
hardware_multiply_implementation_embedded_mults = "1";
hardware_multiply_implementation_les = "2";
altera_show_unreleased_features = "0";
cache_omit_dcache = "0";
cache_omit_icache = "0";
omit_instruction_master = "0";
omit_data_master = "0";
num_data_channel_masters = "0";
num_instruction_channel_masters = "0";
gui_branch_prediction_type = "Automatic";
branch_prediction_type = "Dynamic";
bht_index_pc_only = "0";
cpuid_sz = "1";
cpuid_value = "0";
gui_hardware_multiply_setting = "le_mul_fast_le_shift";
hardware_multiply_impl = "le_mul";
num_tightly_coupled_data_masters = "0";
num_tightly_coupled_instruction_masters = "0";
shift_rot_impl = "fast_le_shift";
license_status = "encrypted";
}
SYSTEM_BUILDER_INFO
{
Parameters_Signature = "";
Is_CPU = "1";
Is_Enabled = "1";
Instantiate_In_System_Module = "1";
Default_Module_Name = "cpu";
View
{
MESSAGES
{
}
Is_Collapsed = "0";
Settings_Summary = "Nios II/f
<br> 4-Kbyte Instruction Cache
<br> 2-Kbyte Data Cache
<br> JTAG Debug Module
";
}
Required_Device_Family = "STRATIX,STRATIXII,CYCLONE";
Clock_Source = "clk";
}
SOFTWARE_COMPONENT altera_hal
{
class = "altera_hal";
class_version = "1.0";
WIZARD_SCRIPT_ARGUMENTS
{
}
SYSTEM_BUILDER_INFO
{
Is_Enabled = "1";
}
}
SOFTWARE_COMPONENT altera_nios2_test
{
class = "altera_nios2_test";
class_version = "2.0";
WIZARD_SCRIPT_ARGUMENTS
{
CONSTANTS
{
CONSTANT debug_on
{
value = "0";
comment = "Enable debug features";
}
}
}
SYSTEM_BUILDER_INFO
{
Is_Enabled = "0";
}
}
SOFTWARE_COMPONENT altera_plugs_library
{
class = "altera_plugs_library";
class_version = "2.1";
WIZARD_SCRIPT_ARGUMENTS
{
CONSTANTS
{
CONSTANT PLUGS_PLUG_COUNT
{
value = "5";
comment = "Maximum number of plugs";
}
CONSTANT PLUGS_ADAPTER_COUNT
{
value = "2";
comment = "Maximum number of adapters";
}
CONSTANT PLUGS_DNS
{
value = "1";
comment = "Have routines for DNS lookups";
}
CONSTANT PLUGS_PING
{
value = "1";
comment = "Respond to icmp echo (ping) messages";
}
CONSTANT PLUGS_TCP
{
value = "1";
comment = "Support tcp in/out connections";
}
CONSTANT PLUGS_IRQ
{
value = "1";
comment = "Run at interrupte level";
}
CONSTANT PLUGS_DEBUG
{
value = "1";
comment = "Support debug routines";
}
}
}
SYSTEM_BUILDER_INFO
{
Is_Enabled = "1";
}
}
PORT_WIRING
{
PORT jtag_debug_offchip_trace_clk
{
direction = "output";
width = "1";
}
PORT jtag_debug_offchip_trace_data
{
direction = "output";
width = "18";
}
PORT jtag_debug_trigout
{
direction = "output";
width = "1";
}
PORT clkx2
{
direction = "input";
width = "1";
}
}
SIMULATION
{
DISPLAY
{
SIGNAL aaa
{
format = "Logic";
name = "i_readdata";
radix = "hexadecimal";
}
SIGNAL aab
{
format = "Logic";
name = "i_readdatavalid";
radix = "hexadecimal";
}
SIGNAL aac
{
format = "Logic";
name = "i_waitrequest";
radix = "hexadecimal";
}
SIGNAL aad
{
format = "Logic";
name = "i_address";
radix = "hexadecimal";
}
SIGNAL aae
{
format = "Logic";
name = "i_read";
radix = "hexadecimal";
}
SIGNAL aaf
{
format = "Logic";
name = "E_ci_combo_dataa";
radix = "hexadecimal";
}
SIGNAL aag
{
format = "Logic";
name = "E_ci_combo_datab";
radix = "hexadecimal";
}
SIGNAL aah
{
format = "Logic";
name = "E_ci_combo_n";
radix = "hexadecimal";
}
SIGNAL aai
{
format = "Logic";
name = "E_ci_combo_a";
radix = "hexadecimal";
}
SIGNAL aaj
{
format = "Logic";
name = "E_ci_combo_b";
radix = "hexadecimal";
}
SIGNAL aak
{
format = "Logic";
name = "E_ci_combo_c";
radix = "hexadecimal";
}
SIGNAL aal
{
format = "Logic";
name = "E_ci_combo_readra";
radix = "hexadecimal";
}
SIGNAL aam
{
format = "Logic";
name = "E_ci_combo_readrb";
radix = "hexadecimal";
}
SIGNAL aan
{
format = "Logic";
name = "E_ci_combo_writerc";
radix = "hexadecimal";
}
SIGNAL aao
{
format = "Logic";
name = "E_ci_combo_result";
radix = "hexadecimal";
}
SIGNAL aap
{
format = "Logic";
name = "clk";
radix = "hexadecimal";
}
SIGNAL aaq
{
format = "Logic";
name = "reset_n";
radix = "hexadecimal";
}
SIGNAL aar
{
format = "Logic";
name = "d_readdata";
radix = "hexadecimal";
}
SIGNAL aas
{
format = "Logic";
name = "d_waitrequest";
radix = "hexadecimal";
}
SIGNAL aat
{
format = "Logic";
name = "d_irq";
radix = "hexadecimal";
}
SIGNAL aau
{
format = "Logic";
name = "d_address";
radix = "hexadecimal";
}
SIGNAL aav
{
format = "Logic";
name = "d_byteenable";
radix = "hexadecimal";
}
SIGNAL aaw
{
format = "Logic";
name = "d_read";
radix = "hexadecimal";
}
SIGNAL aax
{
format = "Logic";
name = "d_write";
radix = "hexadecimal";
}
SIGNAL aay
{
format = "Logic";
name = "d_writedata";
radix = "hexadecimal";
}
SIGNAL aaz
{
format = "Divider";
name = "base pipeline";
radix = "";
}
SIGNAL aba
{
format = "Logic";
name = "clk";
radix = "hexadecimal";
}
SIGNAL abb
{
format = "Logic";
name = "reset_n";
radix = "hexadecimal";
}
SIGNAL abc
{
format = "Logic";
name = "D_stall";
radix = "hexadecimal";
}
SIGNAL abd
{
format = "Logic";
name = "A_stall";
radix = "hexadecimal";
}
SIGNAL abe
{
format = "Logic";
name = "F_pcb_nxt";
radix = "hexadecimal";
}
SIGNAL abf
{
format = "Logic";
name = "F_pcb";
radix = "hexadecimal";
}
SIGNAL abg
{
format = "Logic";
name = "D_pcb";
radix = "hexadecimal";
}
SIGNAL abh
{
format = "Logic";
name = "E_pcb";
radix = "hexadecimal";
}
SIGNAL abi
{
format = "Logic";
name = "M_pcb";
radix = "hexadecimal";
}
SIGNAL abj
{
format = "Logic";
name = "A_pcb";
radix = "hexadecimal";
}
SIGNAL abk
{
format = "Logic";
name = "W_pcb";
radix = "hexadecimal";
}
SIGNAL abl
{
format = "Logic";
name = "F_vinst";
radix = "ascii";
}
SIGNAL abm
{
format = "Logic";
name = "D_vinst";
radix = "ascii";
}
SIGNAL abn
{
format = "Logic";
name = "E_vinst";
radix = "ascii";
}
SIGNAL abo
{
format = "Logic";
name = "M_vinst";
radix = "ascii";
}
SIGNAL abp
{
format = "Logic";
name = "A_vinst";
radix = "ascii";
}
SIGNAL abq
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