music.rpt

用CPLD做音乐发生器

  4: clk10_count<11>.FBK.LFBK 
                       11: clk10_count<1>.FBK.LFBK 
                                             17: clk10_count<7>.FBK.LFBK 
  5: clk10_count<12>.FBK.LFBK 
                       12: clk10_count<2>.FBK.LFBK 
                                             18: clk10_count<8>.FBK.LFBK 
  6: clk10_count<13>.FBK.LFBK 
                       13: clk10_count<3>.FBK.LFBK 
                                             19: clk10_count<9>.FBK.LFBK 
  7: clk10_count<14>  

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
clk10_count<9>       XX........XXXXXXXX...................... 10      10
clk10_count<8>       XX........XXXXXXX....................... 9       9
clk10_count<7>       XX........XXXXXX........................ 8       8
clk10_count<6>       XX........XXXXX......................... 7       7
clk10_count<5>       XX........XXXX.......................... 6       6
clk10_count<4>       XX........XXX........................... 5       5
clk10_count<3>       XX........XX............................ 4       4
clk10_count<2>       XX........X............................. 3       3
clk10_count<1>       XX...................................... 2       2
clk10_count<17>      XXXXXXXXX.XXXXXXXXX..................... 18      18
clk10_count<16>      XXXXXXXX..XXXXXXXXX..................... 17      17
clk10_count<13>      XXXXX.....XXXXXXXXX..................... 14      14
clk10_count<12>      XXXX......XXXXXXXXX..................... 13      13
clk10_count<11>      XXX.......XXXXXXXXX..................... 12      12
clk10_count<10>      XX........XXXXXXXXX..................... 11      11
clk10                XXXXXXXXXXXXXXXXXXX..................... 19      19
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input             GCK - Global Clock
               O  - Output            GTS - Global Output Enable
              (b) - Buried macrocell  GSR - Global Set/Reset
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
*********************************** FB3 ***********************************
Number of function block inputs used/remaining:               32/4
Number of signals used by logic mapping into function block:  32
Signal              Total   Imp   Exp Unused  Loc     Pwr   Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt              Mode   #    Type    Use
(unused)              0       0   \/5   0     FB3_1               (b)     (b)
tone_count<4>        10       5<-   0   0     FB3_2   STD   14    I/O     (b)
(unused)              0       0   \/5   0     FB3_3         15    I/O     (b)
tone_count<5>        10       5<-   0   0     FB3_4   STD         (b)     (b)
(unused)              0       0   \/5   0     FB3_5         17    I/O     I
tone_count<6>        10       5<-   0   0     FB3_6   STD   18    I/O     I
(unused)              0       0   \/5   0     FB3_7               (b)     (b)
spk                   7       5<- \/3   0     FB3_8   STD   19    I/O     O
tone_count<7>         9       4<-   0   0     FB3_9   STD   20    I/O     (b)
tone_count<8>         9       5<- /\1   0     FB3_10  STD         (b)     (b)
(unused)              0       0   /\5   0     FB3_11        21    I/O     (b)
tone_count<2>         8       3<-   0   0     FB3_12  STD   23    I/O     (b)
tone_count<9>         7       5<- /\3   0     FB3_13  STD         (b)     (b)
(unused)              0       0   /\5   0     FB3_14        24    I/O     (b)
tone_count<1>         5       0     0   0     FB3_15  STD   25    I/O     (b)
clk10_count<14>       2       0   \/3   0     FB3_16  STD   26    I/O     (b)
tone_count<3>         9       4<-   0   0     FB3_17  STD   31    I/O     (b)
clk10_count<15>       2       0   /\1   2     FB3_18  STD         (b)     (b)

Signals Used by Logic in Function Block
  1: clk               12: clk10_count<5>    23: tone_count<4>.FBK.LFBK 
  2: clk10_count<0>    13: clk10_count<6>    24: tone_count<5>.FBK.LFBK 
  3: clk10_count<10>   14: clk10_count<7>    25: tone_count<6>.FBK.LFBK 
  4: clk10_count<11>   15: clk10_count<8>    26: tone_count<7>.FBK.LFBK 
  5: clk10_count<12>   16: clk10_count<9>    27: tone_count<8>.FBK.LFBK 
  6: clk10_count<13>   17: spk_obuf.FBK.LFBK 28: tone_count<9>.FBK.LFBK 
  7: clk10_count<14>.FBK.LFBK 
                       18: tone_count<0>     29: tone_index<0> 
  8: clk10_count<1>    19: tone_count<10>    30: tone_index<1> 
  9: clk10_count<2>    20: tone_count<1>.FBK.LFBK 
                                             31: tone_index<2> 
 10: clk10_count<3>    21: tone_count<2>.FBK.LFBK 
                                             32: tone_index<3> 
 11: clk10_count<4>    22: tone_count<3>.FBK.LFBK 
                                            

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
tone_count<4>        X................XXXXXXXXXXXXXXX........ 16      16
tone_count<5>        X................XXXXXXXXXXXXXXX........ 16      16
tone_count<6>        X................XXXXXXXXXXXXXXX........ 16      16
spk                  X...............XXXXXXXXXXXXXXXX........ 17      17
tone_count<7>        X................XXXXXXXXXXXXXXX........ 16      16
tone_count<8>        X................XXXXXXXXXXXXXXX........ 16      16
tone_count<2>        X................XXXXXXXXXXXXXXX........ 16      16
tone_count<9>        X................XXXXXXXXXXXXXXX........ 16      16
tone_count<1>        X................XXXXXXXXXXXXXXX........ 16      16
clk10_count<14>      XXXXXX.XXXXXXXXX........................ 15      15
tone_count<3>        X................XXXXXXXXXXXXXXX........ 16      16
clk10_count<15>      XXXXXXXXXXXXXXXX........................ 16      16
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input             GCK - Global Clock
               O  - Output            GTS - Global Output Enable
              (b) - Buried macrocell  GSR - Global Set/Reset
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
*********************************** FB4 ***********************************
Number of function block inputs used/remaining:               31/5
Number of signals used by logic mapping into function block:  31
Signal              Total   Imp   Exp Unused  Loc     Pwr   Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt              Mode   #    Type    Use
(unused)              0       0     0   5     FB4_1               (b)     
(unused)              0       0     0   5     FB4_2         57    I/O     
cnt1<0>               1       0     0   4     FB4_3   STD   58    I/O     (b)
clk10_count<0>        1       0     0   4     FB4_4   STD         (b)     (b)
cnt1<4>               2       0     0   3     FB4_5   STD   61    I/O     (b)
cnt1<3>               2       0     0   3     FB4_6   STD   62    I/O     (b)
cnt1<2>               2       0     0   3     FB4_7   STD         (b)     (b)
cnt1<1>               2       0     0   3     FB4_8   STD   63    I/O     (b)
time1<6>              3       0     0   2     FB4_9   STD   65    I/O     (b)
time1<5>              3       0     0   2     FB4_10  STD         (b)     (b)
time1<3>              3       0     0   2     FB4_11  STD   66    I/O     (b)
tone_count<10>        4       0     0   1     FB4_12  STD   67    I/O     (b)
tone_count<0>         4       0     0   1     FB4_13  STD         (b)     (b)
time1<7>              4       0     0   1     FB4_14  STD   68    I/O     (b)
time1<4>              4       0     0   1     FB4_15  STD   69    I/O     (b)
time1<2>              4       0     0   1     FB4_16  STD         (b)     (b)
time1<1>              4       0     0   1     FB4_17  STD   70    I/O     (b)
clk                   5       0     0   0     FB4_18  STD         (b)     (b)

Signals Used by Logic in Function Block
  1: clk.FBK.LFBK      12: time1<4>.FBK.LFBK 22: tone_count<4> 
  2: clk10             13: time1<5>.FBK.LFBK 23: tone_count<5> 
  3: cnt1<0>.FBK.LFBK  14: time1<6>.FBK.LFBK 24: tone_count<6> 
  4: cnt1<1>.FBK.LFBK  15: time1<7>.FBK.LFBK 25: tone_count<7> 
  5: cnt1<2>.FBK.LFBK  16: time1<7>/time1<7>_SETF__$INT 
                                             26: tone_count<8> 
  6: cnt1<3>.FBK.LFBK  17: tone_count<0>.FBK.LFBK 
                                             27: tone_count<9> 
  7: cnt1<4>.FBK.LFBK  18: tone_count<10>.FBK.LFBK 
                                             28: tone_index<0> 
  8: time1<0>          19: tone_count<1>     29: tone_index<1> 
  9: time1<1>.FBK.LFBK 20: tone_count<2>     30: tone_index<2> 
 10: time1<2>.FBK.LFBK 21: tone_count<3>     31: tone_index<3> 
 11: time1<3>.FBK.LFBK

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
cnt1<0>              ..XXXXX................................. 5       5
clk10_count<0>       X....................................... 1       1
cnt1<4>              ..XXXXX................................. 5       5
cnt1<3>              ..XXXXX................................. 5       5
cnt1<2>              ..XXXXX................................. 5       5
cnt1<1>              ..XXXXX................................. 5       5
time1<6>             .X.....XXXXXX..X........................ 8       8
time1<5>             .X.....XXXXX...X........................ 7       7
time1<3>             .X.....XXX.....X........................ 5       5
tone_count<10>       X...............XXXXXXXXXXXXXXX......... 16      16
tone_count<0>        X...............XXXXXXXXXXXXXXX......... 16      16
time1<7>             .X.....XXXXXXXXX........................ 10      10
time1<4>             .X.....XXXXXXXXX........................ 10      10
time1<2>             .X.....XXXXXXXXX........................ 10      10
time1<1>             .X.....XXXXXXXXX........................ 10      10
clk                  X.XXXXX................................. 6       6
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input             GCK - Global Clock
               O  - Output            GTS - Global Output Enable
              (b) - Buried macrocell  GSR - Global Set/Reset
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
*********************************** FB5 ***********************************
Number of function block inputs used/remaining:               15/21
Number of signals used by logic mapping into function block:  15
Signal              Total   Imp   Exp Unused  Loc     Pwr   Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt              Mode   #    Type    Use
$OpTx$FX_DC$72        2       2<- /\5   0     FB5_1   STD         (b)     (b)
time2<6>              4       1<- /\2   0     FB5_2   STD   32    I/O     (b)
time2<5>              4       0   /\1   0     FB5_3   STD   33    I/O     (b)
time2<3>              4       0   \/1   0     FB5_4   STD         (b)     (b)
time2<0>              4       1<- \/2   0     FB5_5   STD   34    I/O     (b)
time2<7>              6       2<- \/1   0     FB5_6   STD   35    I/O     (b)
$OpTx$FX_DC$79        2       1<- \/4   0     FB5_7   STD         (b)     (b)
time2<4>              6       4<- \/3   0     FB5_8   STD   36    I/O     (b)
time2<2>              6       3<- \/2   0     FB5_9   STD   37    I/O     (b)
time2<1>              6       2<- \/1   0     FB5_10  STD         (b)     (b)
(unused)              0       0   \/5   0     FB5_11        39    I/O     (b)
tone_index<3>        21      16<-   0   0     FB5_12  STD   40    I/O     (b)
(unused)              0       0   /\5   0     FB5_13              (b)     (b)
(unused)              0       0   /\5   0     FB5_14        41    I/O     (b)
(unused)              0       0   \/5   0     FB5_15        43    I/O     (b)
(unused)              0       0   \/5   0     FB5_16              (b)     (b)
BUF_tone_index<2>    25      20<-   0   0     FB5_17  STD   44    I/O     (b)
(unused)              0       0   /\5   0     FB5_18              (b)     (b)

Signals Used by Logic in Function Block
  1: $OpTx$$OpTx$FX_DC$47_INV$558 
                        6: time1<7>          11: time2<4>.FBK.LFBK 
  2: $OpTx$FX_DC$83     7: time2<0>.FBK.LFBK 12: time2<5>.FBK.LFBK 
  3: clk10              8: time2<1>.FBK.LFBK 13: time2<6>.FBK.LFBK 
  4: enable1            9: time2<2>.FBK.LFBK 14: time2<7>.FBK.LFBK 
  5: enable2           10: time2<3>.FBK.LFBK 15: time2<7>/time2<7>_SETF__$INT 

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
$OpTx$FX_DC$72       .......X.XX.X........................... 4       4
time2<6>             ..XXX.XXXXXX..X......................... 10      10
time2<5>             ..XXX.XXXXX...X......................... 9       9
time2<3>             ..XXX.XXX.....X......................... 7       7
time2<0>             ..XXX.XXXXXXXXX......................... 12      12
time2<7>             ..XXX.XXXXXXXXX......................... 12      12
$OpTx$FX_DC$79       ......XXXXX............................. 5       5
time2<4>             ..XXX.XXXXXXXXX......................... 12      12
time2<2>             ..XXX.XXXXXXXXX......................... 12      12