led7.tan.qmsg

EDA

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri May 15 19:17:33 2009 " "Info: Processing started: Fri May 15 19:17:33 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off led7 -c led7 --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off led7 -c led7 --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk_led7 " "Info: Assuming node \"clk_led7\" is an undefined clock" {  } { { "led7.vhd" "" { Text "D:/study/VHDL/led7/led7.vhd" 6 -1 0 } } { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/Assignment Editor.qase" 1 { { 0 "clk_led7" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0 "" 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "clk_led7 " "Info: No valid register-to-register data paths exist for clock \"clk_led7\"" {  } {  } 0 0 "No valid register-to-register data paths exist for clock \"%1!s!\"" 0 0 "" 0}