prev_cmp_led7.qmsg

来自「EDA」· QMSG 代码 · 共 62 行 · 第 1/4 页

{ "Info" "IFITCC_FITCC_QID_PARTITION_BACK_ANNOTATION_TOP" "1 0 " "Info: The Fitter has identified 1 logical partitions of which 0 have a previous placement to use" { { "Info" "IFITCC_FITCC_QID_PARTITION_BACK_ANNOTATION_NONE_OVERRIDE" "26 Top " "Info: Previous placement does not exist for 26 of 26 atoms in partition Top" {  } {  } 0 0 "Previous placement does not exist for %1!d! of %1!d! atoms in partition %2!s!" 0 0 "" 0}  } {  } 0 0 "The Fitter has identified %1!d! logical partitions of which %2!d! have a previous placement to use" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C50F672C6 " "Info: Device EP2C50F672C6 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C70F672C6 " "Info: Device EP2C70F672C6 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0}
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "3 " "Info: Fitter converted 3 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ASDO~ E3 " "Info: Pin ~ASDO~ is reserved at location E3" {  } { { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/pin_planner.ppl" { ~ASDO~ } } } { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } } { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~nCSO~ D3 " "Info: Pin ~nCSO~ is reserved at location D3" {  } { { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/pin_planner.ppl" { ~nCSO~ } } } { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } } { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~LVDS150p/nCEO~ AE24 " "Info: Pin ~LVDS150p/nCEO~ is reserved at location AE24" {  } { { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/pin_planner.ppl" { ~LVDS150p/nCEO~ } } } { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~LVDS150p/nCEO~ } "NODE_NAME" } } { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~LVDS150p/nCEO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0}  } {  } 0 0 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "" 0}
{ "Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "1 12 " "Warning: No exact pin location assignment(s) for 1 pins of 12 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "clk_led7 " "Info: Pin clk_led7 not assigned to an exact location on the device" {  } { { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/pin_planner.ppl" { clk_led7 } } } { "led7.vhd" "" { Text "D:/study/VHDL/led7/led7.vhd" 6 -1 0 } } { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_led7 } "NODE_NAME" } } { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_led7 } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0}  } {  } 0 0 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk_led7 (placed in PIN P26 (CLK7, LVDSCLK3n, Input)) " "Info: Automatically promoted node clk_led7 (placed in PIN P26 (CLK7, LVDSCLK3n, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G7 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G7" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0}  } { { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/pin_planner.ppl" { clk_led7 } } } { "led7.vhd" "" { Text "D:/study/VHDL/led7/led7.vhd" 6 -1 0 } } { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_led7 } "NODE_NAME" } } { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_led7 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Performing register packing on registers with non-logic cell location assignments" 1 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Completed register packing on registers with non-logic cell location assignments" 1 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Extra Info: Started Fast Input/Output/OE register processing" {  } {  } 1 0 "Started Fast Input/Output/OE register processing" 1 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Extra Info: Finished Fast Input/Output/OE register processing" {  } {  } 1 0 "Finished Fast Input/Output/OE register processing" 1 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Extra Info: Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" {  } {  } 1 0 "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" 1 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Extra Info: Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" {  } {  } 1 0 "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" 1 0 "" 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "00:00:00 " "Info: Finished register packing: elapsed time is 00:00:00" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "Extra Info: No registers were packed into other blocks" {  } {  } 1 0 "No registers were packed into other blocks" 0 0 "" 0}  } {  } 0 0 "Finished register packing: elapsed time is %1!s!" 0 0 "" 0}
{ "Warning" "WCUT_CUT_UNATTACHED_ASGN" "" "Warning: Ignored locations or region assignments to the following nodes" { { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "clk " "Warning: Node \"clk\" is assigned to location or region, but does not exist in design" {  } { { "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/study/eda-quartus7.2/eda-quartus7.2/quartus/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } }  } 0 0 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "" 0}  } {  } 0 0 "Ignored locations or region assignments to the following nodes" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "" 0}