📄 实验6_ta_思考3.s43
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#include "msp430x44x.h"
;******************************************************************************
; MSP-Test44x Demo - Timer_A Toggle P5.1, overflow ISR, 32kHz ACLK
;
; Description; Toggle P5.1 using using software and the timer_A overflow ISR.
; In this example an ISR will trigger when TA overflows. Inside the ISR P5.1
; is toggled. Toggle rate is exactly 0.25hz.
; ACLK = TACLK = LFXT1 = 32768, MCLK = SMCLK = DCO = 32xACLK = 1.048576MHz
; //*An external watch crystal on XIN XOUT is required for ACLK*//
;
; MSP430F449
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P5.1|-->LED
;
; Yang Rui
; Lierda, Inc
; NOVEMBER 2003
; Built with IAR Embedded Workbench Version: 1.26B
;------------------------------------------------------------------------------
ORG 01100h ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0A00h,SP ; Initialize '449 stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupFLL bis.b #XCAP14PF,&FLL_CTL0 ; Configure load caps
SetupTA mov.w #TASSEL0+TACLR+TAIE,&TACTL ; ACLK, Clr TAR, interrupt
SetupP5 bis.b #002h,&P5DIR ; P5.1 output
bis.w #MC1,&TACTL ; Start timer_A continous mode
eint ; Enable interrupts
;
Mainloop bis.w #LPM3,SR ; MCLK is not required
nop ; Required only for C-spy
;
;------------------------------------------------------------------------------
TAX_ISR; Common ISR for CCR1-4 and overflow
;------------------------------------------------------------------------------
add.w &TAIV,PC ; Add Timer_A offset vector
reti ; CCR0 - no source
reti ; CCR1
reti ; CCR2
reti ; CCR3
reti ; CCR4
TA_over xor.b #002h,&P5OUT ; Toggle P5.1
reti ; Return from overflow ISR
;
;------------------------------------------------------------------------------
; Interrupt Vectors Used MSP430x44x
;------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFEAh ; Timer_AX Vector
DW TAX_ISR ;
END
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