📄 实验6_tb_思考1.s43
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#include "msp430x44x.h"
;******************************************************************************
; MSP-Test44x Demo - Timer_B Toggle P5.1, TBCCR0 Contmode ISR, DCO SMCLK
;
; Description; Toggle P5.1 using software and TB_0 ISR. Toggle rate is set
; at 50000 DCO/SMCLK cycles. Default DCO frequency is used for TBCLK.
; Durring the TB_0 ISR P5.1 is toggled and 50000 additional cycles are added
; to TBCCR0.CPU us used only durring TB_ISR.
; ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO
;
; MSP430F449
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P5.1|-->LED
;
; Yang Rui
; Lierda, Inc
; NOVEMBER 2003
; Built with IAR Embedded Workbench Version: 1.26B
;------------------------------------------------------------------------------
ORG 01100h ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0A00h,SP ; Initialize '449 stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupTB mov.w #TBSSEL1+TBCLR,&TBCTL ; SMCLK, clear TAR
SetupC0 mov.w #CCIE,&TBCCTL0 ; CCR0 interrupt enabled
mov.w #50000,&TBCCR0 ;
SetupP5 bis.b #002h,&P5DIR ; P5.1 output
bis.w #MC1,&TBCTL ; Start Timer_a in continous mode
eint ; Enable interrupts
;
Mainloop bis.w #CPUOFF,SR ; CPU off
nop ; Required for C-spy
;
;------------------------------------------------------------------------------
TB0_ISR; Toggle P5.1
;------------------------------------------------------------------------------
xor.b #002h,&P5OUT ; Toggle P5.1
add.w #50000,&TBCCR0 ; Add Offset to CCR0
reti ;
;
;-----------------------------------------------------------------------------
; Interrupt Vectors Used MSP430F44x
;-----------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFFAh ; Timer_B0 Vector
DW TB0_ISR ;
END
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