📄 lcd.txt
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; generated by ARM/Thumb C/C++ Compiler with , RVCT3.1 [Build 934] for uVision
; commandline ArmCC [--debug -c --asm --interleave -olcd.o --depend=lcd.d --device=DARMP --apcs=interwork -O3 -IC:\Keil\ARM\INC\Philips --omf_browse=lcd.crf LCD.c]
ARM
AREA ||.text||, CODE, READONLY, ALIGN=2
lcdSpiSpeedSet PROC
000000 e59f02ec LDR r0,|L1.756|
000004 e3a0100c MOV r1,#0xc
000008 e5c0100c STRB r1,[r0,#0xc]
00000c e3a01030 MOV r1,#0x30
000010 e5c01000 STRB r1,[r0,#0]
000014 e12fff1e BX lr
ENDP
lcdWriteByte PROC
000018 e59f12d4 LDR r1,|L1.756|
00001c e5c10008 STRB r0,[r1,#8]
|L1.32|
000020 e5d10004 LDRB r0,[r1,#4]
000024 e3100080 TST r0,#0x80
000028 0afffffc BEQ |L1.32|
00002c e12fff1e BX lr
ENDP
lcdWriteCmd PROC
000030 e59f22c0 LDR r2,|L1.760|
000034 e592301c LDR r3,[r2,#0x1c]
000038 e2421902 SUB r1,r2,#0x8000
00003c e3833502 ORR r3,r3,#0x800000
000040 e582301c STR r3,[r2,#0x1c]
000044 e5c10008 STRB r0,[r1,#8]
|L1.72|
000048 e5d10004 LDRB r0,[r1,#4]
00004c e3100080 TST r0,#0x80
000050 0afffffc BEQ |L1.72|
000054 e5920014 LDR r0,[r2,#0x14]
000058 e3800502 ORR r0,r0,#0x800000
00005c e5820014 STR r0,[r2,#0x14]
000060 e12fff1e BX lr
ENDP
lcdUpdateDisplay PROC
;;;209 void lcdUpdateDisplay(void)
;;;210 {
000064 e92d4030 PUSH {r4,r5,lr}
;;;211 //unsigned int n = 504;
;;;212 unsigned char * p = disBuf;
000068 e59fc28c LDR r12,|L1.764|
;;;213 unsigned int i,j;
;;;214
;;;215 #if HW_SPI /* If hardware SPI is used, adjust the SPI speed*/
;;;216 lcdSpiSpeedSet(); /* Other SPI device may share the SPI & they may change the speed */
00006c ebfffffe BL lcdSpiSpeedSet
;;;217 #endif
;;;218
;;;219 LCD_E_L; /* Chip select, we then do not need to assert and dessert it in each spi cycle */
000070 e59f5280 LDR r5,|L1.760|
000074 e595000c LDR r0,[r5,#0xc]
000078 e3800b02 ORR r0,r0,#0x800
00007c e585000c STR r0,[r5,#0xc]
;;;220
;;;221 /***************************************************************************/
;;;222 /*** It seems that some 3310lcd do not support the following code ****/
;;;223
;;;224 //lcdWriteCmd(0x0c);
;;;225 //lcdWriteCmd(0x40 | 0); /* Set row to 0 */
;;;226 //lcdWriteCmd(0x80 | 0); /* Set column to 0*/
;;;227 /* To make sure the data always start at codinate(0,0) */
;;;228 //while(n--)
;;;229 // lcdWriteByte(*p++);
;;;230 /***************************************************************************/
;;;231
;;;232 /* so we use this, set the address at each row */
;;;233 for(i=0;i<6;i++)
000080 e3a04000 MOV r4,#0
|L1.132|
;;;234 {
;;;235 lcdWriteCmd(0x40 | i); /* Set row to 0 */
000084 e20400ff AND r0,r4,#0xff
000088 e3800040 ORR r0,r0,#0x40
00008c ebfffffe BL lcdWriteCmd
;;;236 lcdWriteCmd(0x80 | 0); /* Set column to 0*/
000090 e3a00080 MOV r0,#0x80
000094 ebfffffe BL lcdWriteCmd
;;;237 for(j=0;j<84;j++)
000098 e3a02000 MOV r2,#0
|L1.156|
;;;238 {
;;;239 lcdWriteByte(*p++); /* send one byte data */
00009c e4dc0001 LDRB r0,[r12],#1
0000a0 ebfffffe BL lcdWriteByte
0000a4 e2822001 ADD r2,r2,#1 ;237
0000a8 e3520054 CMP r2,#0x54 ;237
0000ac 3afffffa BCC |L1.156|
0000b0 e2844001 ADD r4,r4,#1 ;233
0000b4 e3540006 CMP r4,#6 ;233
0000b8 3afffff1 BCC |L1.132|
;;;240 }
;;;241 }
;;;242 LCD_E_H; /* chip deselect */
0000bc e5950004 LDR r0,[r5,#4]
0000c0 e3800b02 ORR r0,r0,#0x800
0000c4 e5850004 STR r0,[r5,#4]
;;;243 }
0000c8 e8bd4030 POP {r4,r5,lr}
0000cc e12fff1e BX lr
;;;244
ENDP
lcdClrDisBuf PROC
0000d0 e59f0224 LDR r0,|L1.764|
0000d4 e3a01f7e MOV r1,#0x1f8 ;0
0000d8 e3a02000 MOV r2,#0 ;0
|L1.220|
0000dc e2411001 SUB r1,r1,#1 ;0
0000e0 e3710001 CMN r1,#1 ;0
0000e4 14c02001 STRBNE r2,[r0],#1 ;0
0000e8 1afffffb BNE |L1.220|
0000ec e12fff1e BX lr ;0
ENDP
lcdInit PROC
;;;137 #endif
;;;138 LCD_PORT_INI; /* IO port initialization*/
0000f0 e59f0208 LDR r0,|L1.768|
0000f4 e92d4010 PUSH {r4,lr}
0000f8 e5901000 LDR r1,[r0,#0]
0000fc e3c11403 BIC r1,r1,#0x3000000
000100 e5801000 STR r1,[r0,#0]
000104 e2404901 SUB r4,r0,#0x4000
000108 e5941008 LDR r1,[r4,#8]
00010c e3811a01 ORR r1,r1,#0x1000
000110 e5841008 STR r1,[r4,#8]
000114 e5941004 LDR r1,[r4,#4]
000118 e3811a01 ORR r1,r1,#0x1000
00011c e5841004 STR r1,[r4,#4]
000120 e5901000 LDR r1,[r0,#0]
000124 e3c11503 BIC r1,r1,#0xc00000
000128 e5801000 STR r1,[r0,#0]
00012c e5941008 LDR r1,[r4,#8]
000130 e3811b02 ORR r1,r1,#0x800
000134 e5841008 STR r1,[r4,#8]
000138 e5941004 LDR r1,[r4,#4]
00013c e3811b02 ORR r1,r1,#0x800
000140 e5841004 STR r1,[r4,#4]
000144 e5901014 LDR r1,[r0,#0x14]
000148 e3c11008 BIC r1,r1,#8
00014c e5801014 STR r1,[r0,#0x14]
000150 e5941018 LDR r1,[r4,#0x18]
000154 e3811502 ORR r1,r1,#0x800000
000158 e5841018 STR r1,[r4,#0x18]
00015c e5941014 LDR r1,[r4,#0x14]
000160 e3811502 ORR r1,r1,#0x800000
000164 e5841014 STR r1,[r4,#0x14]
000168 e5901000 LDR r1,[r0,#0]
00016c e3c11c3f BIC r1,r1,#0x3f00
000170 e5801000 STR r1,[r0,#0]
000174 e5901000 LDR r1,[r0,#0]
000178 e3811c15 ORR r1,r1,#0x1500
00017c e5801000 STR r1,[r0,#0]
;;;139
;;;140 #if 0
;;;141 #if HW_SPI /* If hardware SPI is used, Initialize SPI & adjust the SPI speed */
;;;142
;;;143 /* disable PIO from controlling MOSI, MISO, SCK (=hand over to SPI) */
;;;144 pPIO->PIO_PDR = AT91C_PA12_MISO | AT91C_PA13_MOSI | AT91C_PA14_SPCK;
;;;145 /* set pin-functions in PIO Controller */
;;;146 pPIO->PIO_ASR = AT91C_PA12_MISO | AT91C_PA13_MOSI | AT91C_PA14_SPCK;
;;;147
;;;148 /* enable peripheral clock for SPI ( PID Bit 5 ) */
;;;149 pPMC->PMC_PCER = ( 1 << AT91C_ID_SPI ); /* n.b. IDs are just bit-numbers */
;;;150
;;;151 /* SPI enable and reset */
;;;152 pSPI->SPI_CR = AT91C_SPI_SPIEN | AT91C_SPI_SWRST;
;;;153
;;;154 /* SPI mode: master, fixed periph. sel., FDIV=0, fault detection disabled */
;;;155 pSPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_PS_FIXED | AT91C_SPI_MODFDIS;
;;;156
;;;157 /* set PCS for fixed select, in this program we do not use select of the SPI */
;;;158 /* We control the select ourself, so the default cs is 0, but we never use it */
;;;159 pSPI->SPI_MR &= 0xFFF0FFFF; /* clear old PCS - redundant (AT91lib) */
;;;160 pSPI->SPI_MR |= ( (0<<16) & AT91C_SPI_PCS ); /* set PCS */
;;;161 pSPI->SPI_CSR[0] = AT91C_SPI_NCPHA | AT91C_SPI_BITS_8;
;;;162
;;;163 /* set SPI clock speed */
;;;164 lcdSpiSpeedSet();
;;;165
;;;166 /* Enable SPI interface */
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