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📄 bsp_periph.txt

📁 stm32 ucos 精简移殖版本 不需作任何修改直接便可运行。包含串口 定时器
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; generated by ARM/Thumb C/C++ Compiler with , RVCT3.1 [Build 919] for uVision
; commandline ArmCC [--debug -c --asm --interleave -o.\output\bsp_periph.o --depend=.\output\bsp_periph.d --device=DARMSTM --apcs=interwork -O1 -I. -I..\BSP -I..\..\..\..\..\uCOS-II\Ports\arm-cortex-m3\Generic\RealView -I..\..\..\..\..\uCOS-II\Source -I..\..\..\..\..\CPU\ST\STM32\inc -I..\..\..\..\..\uC-CPU -I..\..\..\..\..\uC-CPU\Arm-Cortex-M3\RealView -I..\..\..\..\..\uC-LIB -IC:\Keil\ARM\INC\ST\STM32F10x --omf_browse=.\output\bsp_periph.crf ..\BSP\bsp_periph.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  BSP_PeriphClkFreqGet PROC
;;;110    CPU_INT32U  BSP_PeriphClkFreqGet (CPU_DATA  pwr_clk_id)
;;;111    {
000000  b510              PUSH     {r4,lr}
000002  4604              MOV      r4,r0
;;;112        CPU_INT32U  clk_freq;
;;;113        CPU_INT32U  clk_div;
;;;114    
;;;115    
;;;116        clk_freq = BSP_CPU_ClkFreq();
000004  f7fff7ff          BL       BSP_CPU_ClkFreq
;;;117    
;;;118        switch (pwr_clk_id) {
000008  4968              LDR      r1,|L1.428|
00000a  2c2f              CMP      r4,#0x2f
00000c  d01a              BEQ      |L1.68|
00000e  dc23              BGT      |L1.88|
000010  2c24              CMP      r4,#0x24
000012  d017              BEQ      |L1.68|
000014  dc13              BGT      |L1.62|
000016  2c08              CMP      r4,#8
000018  d01d              BEQ      |L1.86|
00001a  dc07              BGT      |L1.44|
00001c  2c07              CMP      r4,#7
00001e  d239              BCS      |L1.148|
000020  e8dfe8df          TBB      [pc,r4]
000024  19191938          DCB      0x19,0x19,0x19,0x38
000028  19381900          DCB      0x19,0x38,0x19,0x00
                  |L1.44|
00002c  2c0a              CMP      r4,#0xa
00002e  d012              BEQ      |L1.86|
000030  2c20              CMP      r4,#0x20
000032  d007              BEQ      |L1.68|
000034  2c22              CMP      r4,#0x22
000036  d005              BEQ      |L1.68|
000038  2c23              CMP      r4,#0x23
00003a  d12b              BNE      |L1.148|
00003c  e002              B        |L1.68|
                  |L1.62|
00003e  3c25              SUBS     r4,r4,#0x25
000040  2c09              CMP      r4,#9
000042  d827              BHI      |L1.148|
                  |L1.68|
;;;119            case BSP_PERIPH_ID_DMA1:
;;;120            case BSP_PERIPH_ID_DMA2:
;;;121            case BSP_PERIPH_ID_SRAM:
;;;122            case BSP_PERIPH_ID_FLITF:
;;;123            case BSP_PERIPH_ID_CRC:
;;;124            case BSP_PERIPH_ID_FSMC:
;;;125            case BSP_PERIPH_ID_SDIO:
;;;126                 return (clk_freq);
;;;127    
;;;128            case BSP_PERIPH_ID_AFIO:
;;;129            case BSP_PERIPH_ID_IOPA:
;;;130            case BSP_PERIPH_ID_IOPB:
;;;131            case BSP_PERIPH_ID_IOPC:
;;;132            case BSP_PERIPH_ID_IOPD:
;;;133            case BSP_PERIPH_ID_IOPE:
;;;134            case BSP_PERIPH_ID_IOPF:
;;;135            case BSP_PERIPH_ID_IOPG:
;;;136            case BSP_PERIPH_ID_ADC1:
;;;137            case BSP_PERIPH_ID_ADC2:
;;;138            case BSP_PERIPH_ID_TIM1:
;;;139            case BSP_PERIPH_ID_SPI1:
;;;140            case BSP_PERIPH_ID_TIM8:
;;;141            case BSP_PERIPH_ID_USART1:
;;;142            case BSP_PERIPH_ID_ADC3:
;;;143                 clk_div = (BSP_PERIPH_REG_RCC_CFGR & 0x00003800) >> 11;
000044  6849              LDR      r1,[r1,#4]
000046  f3c1f3c1          UBFX     r1,r1,#11,#3
;;;144                 if (clk_div < 4) {
00004a  2904              CMP      r1,#4
00004c  d303              BCC      |L1.86|
;;;145                     return (clk_freq);
;;;146                 }
;;;147                 clk_div   = (clk_div - 3) << 1;
00004e  1ec9              SUBS     r1,r1,#3
000050  0049              LSLS     r1,r1,#1
;;;148                 clk_freq /= clk_div;
000052  fbb0fbb0          UDIV     r0,r0,r1
                  |L1.86|
;;;149                 return (clk_freq);
;;;150    
;;;151            case BSP_PERIPH_ID_TIM2:
;;;152            case BSP_PERIPH_ID_TIM3:
;;;153            case BSP_PERIPH_ID_TIM4:
;;;154            case BSP_PERIPH_ID_TIM5:
;;;155            case BSP_PERIPH_ID_TIM6:
;;;156            case BSP_PERIPH_ID_TIM7:
;;;157            case BSP_PERIPH_ID_WWDG:
;;;158            case BSP_PERIPH_ID_SPI2:
;;;159            case BSP_PERIPH_ID_SPI3:
;;;160            case BSP_PERIPH_ID_USART2:
;;;161            case BSP_PERIPH_ID_USART3:
;;;162            case BSP_PERIPH_ID_USART4:
;;;163            case BSP_PERIPH_ID_USART5:
;;;164            case BSP_PERIPH_ID_I2C1:
;;;165            case BSP_PERIPH_ID_I2C2:
;;;166            case BSP_PERIPH_ID_USB:
;;;167            case BSP_PERIPH_ID_CAN:
;;;168            case BSP_PERIPH_ID_BKP:
;;;169            case BSP_PERIPH_ID_PWR:
;;;170            case BSP_PERIPH_ID_DAC:
;;;171                 clk_div = (BSP_PERIPH_REG_RCC_CFGR & 0x00000700) >> 8;
;;;172                 if (clk_div < 4) {
;;;173                     return (clk_freq);
;;;174                 }
;;;175                 clk_div   = (clk_div - 3) << 1;
;;;176                 clk_freq /= clk_div;
;;;177                 return (clk_freq);
;;;178        }
;;;179    
;;;180        return ((CPU_INT32U)0);
;;;181    }
000056  bd10              POP      {r4,pc}
                  |L1.88|
000058  3c40              SUBS     r4,r4,#0x40           ;118
00005a  2c1e              CMP      r4,#0x1e              ;118
00005c  d21a              BCS      |L1.148|
00005e  e8dfe8df          TBB      [pc,r4]               ;118
000062  0f0f0f0f          DCB      0x0f,0x0f,0x0f,0x0f
000066  0f0f1919          DCB      0x0f,0x0f,0x19,0x19
00006a  1919190f          DCB      0x19,0x19,0x19,0x0f
00006e  19190f0f          DCB      0x19,0x19,0x0f,0x0f
000072  190f0f0f          DCB      0x19,0x0f,0x0f,0x0f
000076  0f0f0f0f          DCB      0x0f,0x0f,0x0f,0x0f
00007a  190f190f          DCB      0x19,0x0f,0x19,0x0f
00007e  0f0f              DCB      0x0f,0x0f
000080  6849              LDR      r1,[r1,#4]            ;171
000082  f3c1f3c1          UBFX     r1,r1,#8,#3           ;171
000086  2904              CMP      r1,#4                 ;172
000088  d3e5              BCC      |L1.86|
00008a  1ec9              SUBS     r1,r1,#3              ;175
00008c  0049              LSLS     r1,r1,#1              ;175
00008e  fbb0fbb0          UDIV     r0,r0,r1              ;176
000092  bd10              POP      {r4,pc}
                  |L1.148|
000094  2000              MOVS     r0,#0                 ;180
000096  bd10              POP      {r4,pc}
;;;182    
                          ENDP

                  BSP_PeriphEn PROC
;;;201    {
;;;202        switch (pwr_clk_id) {
000098  4a44              LDR      r2,|L1.428|
00009a  2101              MOVS     r1,#1
00009c  282f              CMP      r0,#0x2f
00009e  d01b              BEQ      |L1.216|
0000a0  dc20              BGT      |L1.228|
0000a2  2824              CMP      r0,#0x24
0000a4  d018              BEQ      |L1.216|
0000a6  dc13              BGT      |L1.208|
0000a8  2808              CMP      r0,#8
0000aa  d030              BEQ      |L1.270|
0000ac  dc07              BGT      |L1.190|
0000ae  2807              CMP      r0,#7
0000b0  d217              BCS      |L1.226|
0000b2  e8dfe8df          TBB      [pc,r0]
0000b6  2c2c2c16          DCB      0x2c,0x2c,0x2c,0x16
0000ba  2c162c00          DCB      0x2c,0x16,0x2c,0x00
                  |L1.190|
0000be  280a              CMP      r0,#0xa
0000c0  d025              BEQ      |L1.270|
0000c2  2820              CMP      r0,#0x20
0000c4  d008              BEQ      |L1.216|
0000c6  2822              CMP      r0,#0x22
0000c8  d006              BEQ      |L1.216|
0000ca  2823              CMP      r0,#0x23
0000cc  d109              BNE      |L1.226|
0000ce  e003              B        |L1.216|
                  |L1.208|
0000d0  f1a0f1a0          SUB      r3,r0,#0x25
0000d4  2b09              CMP      r3,#9
0000d6  d804              BHI      |L1.226|
                  |L1.216|
;;;203            case BSP_PERIPH_ID_DMA1:
;;;204            case BSP_PERIPH_ID_DMA2:
;;;205            case BSP_PERIPH_ID_SRAM:
;;;206            case BSP_PERIPH_ID_FLITF:
;;;207            case BSP_PERIPH_ID_CRC:
;;;208            case BSP_PERIPH_ID_FSMC:
;;;209            case BSP_PERIPH_ID_SDIO:
;;;210                 BSP_PERIPH_REG_RCC_AHBENR |= DEF_BIT(pwr_clk_id);
;;;211                 break;
;;;212    
;;;213            case BSP_PERIPH_ID_AFIO:
;;;214            case BSP_PERIPH_ID_IOPA:
;;;215            case BSP_PERIPH_ID_IOPB:
;;;216            case BSP_PERIPH_ID_IOPC:

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