📄 os_time.txt
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; generated by ARM/Thumb C/C++ Compiler with , RVCT3.1 [Build 919] for uVision
; commandline ArmCC [--debug -c --asm --interleave -o.\output\os_time.o --depend=.\output\os_time.d --device=DARMSTM --apcs=interwork -O1 -I. -I..\BSP -I..\..\..\..\..\uCOS-II\Ports\arm-cortex-m3\Generic\RealView -I..\..\..\..\..\uCOS-II\Source -I..\..\..\..\..\CPU\ST\STM32\inc -I..\..\..\..\..\uC-CPU -I..\..\..\..\..\uC-CPU\Arm-Cortex-M3\RealView -I..\..\..\..\..\uC-LIB -IC:\Keil\ARM\INC\ST\STM32F10x --omf_browse=.\output\os_time.crf ..\..\..\..\..\uCOS-II\Source\os_time.c]
THUMB
AREA ||.text||, CODE, READONLY, ALIGN=2
OSTimeDly PROC
;;;44 void OSTimeDly (INT16U ticks)
;;;45 {
000000 b570 PUSH {r4-r6,lr}
000002 4604 MOV r4,r0
;;;46 INT8U y;
;;;47 #if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */
;;;48 OS_CPU_SR cpu_sr = 0;
;;;49 #endif
;;;50
;;;51
;;;52
;;;53 if (OSIntNesting > 0) { /* See if trying to call from an ISR */
000004 4852 LDR r0,|L1.336|
000006 7800 LDRB r0,[r0,#0] ; OSIntNesting
000008 2800 CMP r0,#0
00000a d11c BNE |L1.70|
;;;54 return;
;;;55 }
;;;56 if (ticks > 0) { /* 0 means no delay! */
00000c 2c00 CMP r4,#0
00000e d01a BEQ |L1.70|
;;;57 OS_ENTER_CRITICAL();
000010 f7fff7ff BL OS_CPU_SR_Save
;;;58 y = OSTCBCur->OSTCBY; /* Delay current task */
000014 494f LDR r1,|L1.340|
000016 680a LDR r2,[r1,#0] ; OSTCBCur
000018 f892f892 LDRB r1,[r2,#0x34]
;;;59 OSRdyTbl[y] &= ~OSTCBCur->OSTCBBitX;
00001c 4b4e LDR r3,|L1.344|
00001e f892f892 LDRB r6,[r2,#0x35]
000022 5c5d LDRB r5,[r3,r1]
000024 43b5 BICS r5,r5,r6
000026 545d STRB r5,[r3,r1]
;;;60 if (OSRdyTbl[y] == 0) {
000028 5c59 LDRB r1,[r3,r1]
00002a b929 CBNZ r1,|L1.56|
;;;61 OSRdyGrp &= ~OSTCBCur->OSTCBBitY;
00002c 4b4b LDR r3,|L1.348|
00002e f892f892 LDRB r5,[r2,#0x36]
000032 7819 LDRB r1,[r3,#0] ; OSRdyGrp
000034 43a9 BICS r1,r1,r5
000036 7019 STRB r1,[r3,#0] ; OSRdyGrp
|L1.56|
;;;62 }
;;;63 OSTCBCur->OSTCBDly = ticks; /* Load ticks in TCB */
000038 85d4 STRH r4,[r2,#0x2e]
;;;64 OS_EXIT_CRITICAL();
00003a f7fff7ff BL OS_CPU_SR_Restore
;;;65 OS_Sched(); /* Find next task to run! */
00003e e8bde8bd POP {r4-r6,lr}
000042 f7fff7ff B.W OS_Sched
|L1.70|
;;;66 }
;;;67 }
000046 bd70 POP {r4-r6,pc}
;;;68 /*$PAGE*/
ENDP
OSTimeDlyHMSM PROC
;;;96 INT8U OSTimeDlyHMSM (INT8U hours, INT8U minutes, INT8U seconds, INT16U ms)
;;;97 {
000048 b570 PUSH {r4-r6,lr}
;;;98 INT32U ticks;
;;;99 INT16U loops;
;;;100
;;;101
;;;102 if (OSIntNesting > 0) { /* See if trying to call from an ISR */
00004a 4c41 LDR r4,|L1.336|
00004c 7824 LDRB r4,[r4,#0] ; OSIntNesting
00004e b10c CBZ r4,|L1.84|
;;;103 return (OS_ERR_TIME_DLY_ISR);
000050 2055 MOVS r0,#0x55
;;;104 }
;;;105 #if OS_ARG_CHK_EN > 0
;;;106 if (hours == 0) {
;;;107 if (minutes == 0) {
;;;108 if (seconds == 0) {
;;;109 if (ms == 0) {
;;;110 return (OS_ERR_TIME_ZERO_DLY);
;;;111 }
;;;112 }
;;;113 }
;;;114 }
;;;115 if (minutes > 59) {
;;;116 return (OS_ERR_TIME_INVALID_MINUTES); /* Validate arguments to be within range */
;;;117 }
;;;118 if (seconds > 59) {
;;;119 return (OS_ERR_TIME_INVALID_SECONDS);
;;;120 }
;;;121 if (ms > 999) {
;;;122 return (OS_ERR_TIME_INVALID_MS);
;;;123 }
;;;124 #endif
;;;125 /* Compute the total number of clock ticks required.. */
;;;126 /* .. (rounded to the nearest tick) */
;;;127 ticks = ((INT32U)hours * 3600L + (INT32U)minutes * 60L + (INT32U)seconds) * OS_TICKS_PER_SEC
;;;128 + OS_TICKS_PER_SEC * ((INT32U)ms + 500L / OS_TICKS_PER_SEC) / 1000L;
;;;129 loops = (INT16U)(ticks >> 16); /* Compute the integral number of 65536 tick delays */
;;;130 ticks = ticks & 0xFFFFL; /* Obtain the fractional number of ticks */
;;;131 OSTimeDly((INT16U)ticks);
;;;132 while (loops > 0) {
;;;133 OSTimeDly((INT16U)32768u);
;;;134 OSTimeDly((INT16U)32768u);
;;;135 loops--;
;;;136 }
;;;137 return (OS_ERR_NONE);
;;;138 }
000052 bd70 POP {r4-r6,pc}
|L1.84|
000054 f44ff44f MOV r4,#0x3e8 ;127
000058 4363 MULS r3,r4,r3 ;127
00005a fbb3fbb3 UDIV r3,r3,r4 ;127
00005e f44ff44f MOV r4,#0xe10 ;127
000062 4360 MULS r0,r4,r0 ;127
000064 ebc1ebc1 RSB r1,r1,r1,LSL #4 ;127
000068 eb00eb00 ADD r0,r0,r1,LSL #2 ;127
00006c 4410 ADD r0,r0,r2 ;127
00006e 217d MOVS r1,#0x7d ;127
000070 4348 MULS r0,r1,r0 ;127
000072 eb03eb03 ADD r0,r3,r0,LSL #3 ;127
000076 0c04 LSRS r4,r0,#16 ;129
000078 b280 UXTH r0,r0 ;130
00007a f7fff7ff BL OSTimeDly
00007e f44ff44f MOV r5,#0x8000 ;132
000082 e007 B |L1.148|
|L1.132|
000084 4628 MOV r0,r5 ;133
000086 f7fff7ff BL OSTimeDly
00008a 4628 MOV r0,r5 ;134
00008c f7fff7ff BL OSTimeDly
000090 1e64 SUBS r4,r4,#1 ;135
000092 b2a4 UXTH r4,r4 ;135
|L1.148|
000094 2c00 CMP r4,#0 ;132
000096 d1f5 BNE |L1.132|
000098 2000 MOVS r0,#0 ;137
00009a bd70 POP {r4-r6,pc}
;;;139 #endif
ENDP
OSTimeDlyResume PROC
;;;167 INT8U OSTimeDlyResume (INT8U prio)
;;;168 {
00009c b510 PUSH {r4,lr}
00009e 4604 MOV r4,r0
;;;169 OS_TCB *ptcb;
;;;170 #if OS_CRITICAL_METHOD == 3 /* Storage for CPU status register */
;;;171 OS_CPU_SR cpu_sr = 0;
;;;172 #endif
;;;173
;;;174
;;;175
;;;176 if (prio >= OS_LOWEST_PRIO) {
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