📄 stm32f10x_adc.txt
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;;;680 /* Get the old register value */
;;;681 tmpreg1 = ADCx->SQR1;
;;;682 /* Calculate the mask to clear */
;;;683 tmpreg2 = SQR1_SQ_Set << (5 * (Rank - 13));
;;;684 /* Clear the old SQx bits for the selected rank */
;;;685 tmpreg1 &= ~tmpreg2;
;;;686 /* Calculate the mask to set */
;;;687 tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 13));
;;;688 /* Set the SQx bits for the selected rank */
;;;689 tmpreg1 |= tmpreg2;
;;;690 /* Store the new register value */
;;;691 ADCx->SQR1 = tmpreg1;
;;;692 }
;;;693 }
0001a8 bd70 POP {r4-r6,pc}
|L1.426|
0001aa 2a0d CMP r2,#0xd ;662
0001ac d209 BCS |L1.450|
0001ae 6b04 LDR r4,[r0,#0x30] ;665
0001b0 1fd2 SUBS r2,r2,#7 ;667
0001b2 eb02eb02 ADD r2,r2,r2,LSL #2 ;667
0001b6 4093 LSLS r3,r3,r2 ;667
0001b8 439c BICS r4,r4,r3 ;669
0001ba 4091 LSLS r1,r1,r2 ;671
0001bc 430c ORRS r4,r4,r1 ;673
0001be 6304 STR r4,[r0,#0x30] ;675
0001c0 bd70 POP {r4-r6,pc}
|L1.450|
0001c2 6ac4 LDR r4,[r0,#0x2c] ;681
0001c4 3a0d SUBS r2,r2,#0xd ;683
0001c6 eb02eb02 ADD r2,r2,r2,LSL #2 ;683
0001ca 4093 LSLS r3,r3,r2 ;683
0001cc 439c BICS r4,r4,r3 ;685
0001ce 4091 LSLS r1,r1,r2 ;687
0001d0 430c ORRS r4,r4,r1 ;689
0001d2 62c4 STR r4,[r0,#0x2c] ;691
0001d4 bd70 POP {r4-r6,pc}
;;;694
ENDP
ADC_ExternalTrigConvCmd PROC
;;;710
;;;711 if (NewState != DISABLE)
0001d6 b121 CBZ r1,|L1.482|
;;;712 {
;;;713 /* Enable the selected ADC conversion on external event */
;;;714 ADCx->CR2 |= CR2_EXTTRIG_Set;
0001d8 6881 LDR r1,[r0,#8]
0001da f441f441 ORR r1,r1,#0x100000
0001de 6081 STR r1,[r0,#8]
;;;715 }
;;;716 else
;;;717 {
;;;718 /* Disable the selected ADC conversion on external event */
;;;719 ADCx->CR2 &= CR2_EXTTRIG_Reset;
;;;720 }
;;;721 }
0001e0 4770 BX lr
|L1.482|
0001e2 6881 LDR r1,[r0,#8] ;719
0001e4 f421f421 BIC r1,r1,#0x100000 ;719
0001e8 6081 STR r1,[r0,#8] ;719
0001ea 4770 BX lr
;;;722
ENDP
ADC_GetConversionValue PROC
;;;735 /* Return the selected ADC conversion value */
;;;736 return (u16) ADCx->DR;
0001ec 6cc0 LDR r0,[r0,#0x4c]
0001ee b280 UXTH r0,r0
;;;737 }
0001f0 4770 BX lr
;;;738
ENDP
ADC_GetDualModeConversionValue PROC
;;;747 /* Return the dual mode conversion value */
;;;748 return (*(vu32 *) DR_ADDRESS);
0001f2 4858 LDR r0,|L1.852|
0001f4 6800 LDR r0,[r0,#0]
;;;749 }
0001f6 4770 BX lr
;;;750
ENDP
ADC_AutoInjectedConvCmd PROC
;;;767
;;;768 if (NewState != DISABLE)
0001f8 b121 CBZ r1,|L1.516|
;;;769 {
;;;770 /* Enable the selected ADC automatic injected group conversion */
;;;771 ADCx->CR1 |= CR1_JAUTO_Set;
0001fa 6841 LDR r1,[r0,#4]
0001fc f441f441 ORR r1,r1,#0x400
000200 6041 STR r1,[r0,#4]
;;;772 }
;;;773 else
;;;774 {
;;;775 /* Disable the selected ADC automatic injected group conversion */
;;;776 ADCx->CR1 &= CR1_JAUTO_Reset;
;;;777 }
;;;778 }
000202 4770 BX lr
|L1.516|
000204 6841 LDR r1,[r0,#4] ;776
000206 f421f421 BIC r1,r1,#0x400 ;776
00020a 6041 STR r1,[r0,#4] ;776
00020c 4770 BX lr
;;;779
ENDP
ADC_InjectedDiscModeCmd PROC
;;;796
;;;797 if (NewState != DISABLE)
00020e b121 CBZ r1,|L1.538|
;;;798 {
;;;799 /* Enable the selected ADC injected discontinuous mode */
;;;800 ADCx->CR1 |= CR1_JDISCEN_Set;
000210 6841 LDR r1,[r0,#4]
000212 f441f441 ORR r1,r1,#0x1000
000216 6041 STR r1,[r0,#4]
;;;801 }
;;;802 else
;;;803 {
;;;804 /* Disable the selected ADC injected discontinuous mode */
;;;805 ADCx->CR1 &= CR1_JDISCEN_Reset;
;;;806 }
;;;807 }
000218 4770 BX lr
|L1.538|
00021a 6841 LDR r1,[r0,#4] ;805
00021c f421f421 BIC r1,r1,#0x1000 ;805
000220 6041 STR r1,[r0,#4] ;805
000222 4770 BX lr
;;;808
ENDP
ADC_ExternalTrigInjectedConvConfig PROC
;;;855 /* Get the old register value */
;;;856 tmpreg = ADCx->CR2;
000224 6882 LDR r2,[r0,#8]
;;;857 /* Clear the old external event selection for injected group */
;;;858 tmpreg &= CR2_JEXTSEL_Reset;
000226 f422f422 BIC r2,r2,#0x7000
;;;859 /* Set the external event selection for injected group */
;;;860 tmpreg |= ADC_ExternalTrigInjecConv;
00022a 430a ORRS r2,r2,r1
;;;861 /* Store the new register value */
;;;862 ADCx->CR2 = tmpreg;
00022c 6082 STR r2,[r0,#8]
;;;863 }
00022e 4770 BX lr
;;;864
ENDP
ADC_ExternalTrigInjectedConvCmd PROC
;;;881
;;;882 if (NewState != DISABLE)
000230 b121 CBZ r1,|L1.572|
;;;883 {
;;;884 /* Enable the selected ADC external event selection for injected group */
;;;885 ADCx->CR2 |= CR2_JEXTTRIG_Set;
000232 6881 LDR r1,[r0,#8]
000234 f441f441 ORR r1,r1,#0x8000
000238 6081 STR r1,[r0,#8]
;;;886 }
;;;887 else
;;;888 {
;;;889 /* Disable the selected ADC external event selection for injected group */
;;;890 ADCx->CR2 &= CR2_JEXTTRIG_Reset;
;;;891 }
;;;892 }
00023a 4770 BX lr
|L1.572|
00023c 6881 LDR r1,[r0,#8] ;890
00023e f421f421 BIC r1,r1,#0x8000 ;890
000242 6081 STR r1,[r0,#8] ;890
000244 4770 BX lr
;;;893
ENDP
ADC_SoftwareStartInjectedConvCmd PROC
;;;910
;;;911 if (NewState != DISABLE)
000246 b121 CBZ r1,|L1.594|
;;;912 {
;;;913 /* Enable the selected ADC conversion for injected group on external event and start the selected
;;;914 ADC injected conversion */
;;;915 ADCx->CR2 |= CR2_JEXTTRIG_JSWSTART_Set;
000248 6881 LDR r1,[r0,#8]
00024a f441f441 ORR r1,r1,#0x208000
00024e 6081 STR r1,[r0,#8]
;;;916 }
;;;917 else
;;;918 {
;;;919 /* Disable the selected ADC conversion on external event for injected group and stop the selected
;;;920 ADC injected conversion */
;;;921 ADCx->CR2 &= CR2_JEXTTRIG_JSWSTART_Reset;
;;;922 }
;;;923 }
000250 4770 BX lr
|L1.594|
000252 6881 LDR r1,[r0,#8] ;921
000254 f421f421 BIC r1,r1,#0x208000 ;921
000258 6081 STR r1,[r0,#8] ;921
00025a 4770 BX lr
;;;924
ENDP
ADC_GetSoftwareStartInjectedConvCmdStatus PROC
;;;932 FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx)
;;;933 {
00025c 4601 MOV r1,r0
;;;934 FlagStatus bitstatus = RESET;
00025e 2000 MOVS r0,#0
;;;935
;;;936 /* Check the parameters */
;;;937 assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;938
;;;939 /* Check the status of JSWSTART bit */
;;;940 if ((ADCx->CR2 & CR2_JSWSTART_Set) != (u32)RESET)
000260 6889 LDR r1,[r1,#8]
000262 0289 LSLS r1,r1,#10
000264 d500 BPL |L1.616|
;;;941 {
;;;942 /* JSWSTART bit is set */
;;;943 bitstatus = SET;
000266 2001 MOVS r0,#1
|L1.616|
;;;944 }
;;;945 else
;;;946 {
;;;947 /* JSWSTART bit is reset */
;;;948 bitstatus = RESET;
;;;949 }
;;;950
;;;951 /* Return the JSWSTART bit status */
;;;952 return bitstatus;
;;;953 }
000268 4770 BX lr
;;;954
ENDP
ADC_InjectedChannelConfig PROC
;;;996 void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, u8 ADC_Channel, u8 Rank, u8 ADC_SampleTime)
;;;997 {
00026a b570 PUSH {r4-r6,lr}
;;;998 u32 tmpreg1 = 0, tmpreg2 = 0, tmpreg3 = 0;
;;;999
;;;1000 /* Check the parameters */
;;;1001 assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1002 assert_param(IS_ADC_CHANNEL(ADC_Channel));
;;;1003 assert_param(IS_ADC_INJECTED_RANK(Rank));
;;;1004 assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
;;;1005
;;;1006 /* if ADC_Channel_10 ... ADC_Channel_17 is selected */
;;;1007 if (ADC_Channel > ADC_Channel_9)
00026c 2607 MOVS r6,#7
00026e 2909 CMP r1,#9
000270 d90a BLS |L1.648|
;;;1008 {
;;;1009 /* Get the old register value */
;;;1010 tmpreg1 = ADCx->SMPR1;
000272 68c5 LDR r5,[r0,#0xc]
;;;1011 /* Calculate the mask to clear */
;;;1012 tmpreg2 = SMPR1_SMP_Set << (3*(ADC_Channel - 10));
000274 f1a1f1a1 SUB r4,r1,#0xa
000278 eb04eb04 ADD r4,r4,r4,LSL #1
00027c 40a6 LSLS r6,r6,r4
;;;1013 /* Clear the old discontinuous mode channel count */
;;;1014 tmpreg1 &= ~tmpreg2;
00027e 43b5 BICS r5,r5,r6
;;;1015 /* Calculate the mask to set */
;;;1016 tmpreg2 = (u32)ADC_SampleTime << (3*(ADC_Channel - 10));
000280 40a3 LSLS r3,r3,r4
;;;1017 /* Set the discontinuous mode channel count */
;;;1018 tmpreg1 |= tmpreg2;
000282 431d ORRS r5,r5,r3
;;;1019 /* Store the new register value */
;;;1020 ADCx->SMPR1 = tmpreg1;
000284 60c5 STR r5,[r0,#0xc]
000286 e007 B |L1.664|
|L1.648|
;;;1021 }
;;;1022 else /* ADC_Channel include in ADC_Channel_[0..9] */
;;;1023 {
;;;1024 /* Get the old register value */
;;;1025 tmpreg1 = ADCx->SMPR2;
000288 6905 LDR r5,[r0,#0x10]
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