stm32f10x_adc.txt

stm32 ucos 精简移殖版本 不需作任何修改直接便可运行。包含串口 定时器

; generated by ARM/Thumb C/C++ Compiler with , RVCT3.1 [Build 919] for uVision
; commandline ArmCC [--debug -c --asm --interleave -o.\output\stm32f10x_adc.o --depend=.\output\stm32f10x_adc.d --device=DARMSTM --apcs=interwork -O1 -I. -I..\BSP -I..\..\..\..\..\uCOS-II\Ports\arm-cortex-m3\Generic\RealView -I..\..\..\..\..\uCOS-II\Source -I..\..\..\..\..\CPU\ST\STM32\inc -I..\..\..\..\..\uC-CPU -I..\..\..\..\..\uC-CPU\Arm-Cortex-M3\RealView -I..\..\..\..\..\uC-LIB -IC:\Keil\ARM\INC\ST\STM32F10x --omf_browse=.\output\stm32f10x_adc.crf ..\..\..\..\..\CPU\ST\STM32\src\stm32f10x_adc.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  ADC_DeInit PROC
;;;132    void ADC_DeInit(ADC_TypeDef* ADCx)
;;;133    {
000000  b510              PUSH     {r4,lr}
;;;134      /* Check the parameters */
;;;135      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;136    
;;;137      switch (*(u32*)&ADCx)
000002  49d1              LDR      r1,|L1.840|
000004  1840              ADDS     r0,r0,r1
000006  d011              BEQ      |L1.44|
000008  f44ff44f          MOV      r4,#0x400
00000c  42a0              CMP      r0,r4
00000e  d018              BEQ      |L1.66|
000010  f5b0f5b0          CMP      r0,#0x1800
000014  d11f              BNE      |L1.86|
;;;138      {
;;;139        case ADC1_BASE:
;;;140          /* Enable ADC1 reset state */
;;;141          RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE);
;;;142          /* Release ADC1 from reset state */
;;;143          RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE);
;;;144          break;
;;;145        
;;;146        case ADC2_BASE:
;;;147          /* Enable ADC2 reset state */
;;;148          RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE);
;;;149          /* Release ADC2 from reset state */
;;;150          RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE);
;;;151          break;
;;;152          
;;;153        case ADC3_BASE:
;;;154          /* Enable ADC3 reset state */
;;;155          RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, ENABLE);
000016  2101              MOVS     r1,#1
000018  03cc              LSLS     r4,r1,#15
00001a  4620              MOV      r0,r4
00001c  f7fff7ff          BL       RCC_APB2PeriphResetCmd
;;;156          /* Release ADC3 from reset state */
;;;157          RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, DISABLE);
000020  4620              MOV      r0,r4
000022  e8bde8bd          POP      {r4,lr}
000026  2100              MOVS     r1,#0
000028  f7fff7ff          B.W      RCC_APB2PeriphResetCmd
                  |L1.44|
00002c  2101              MOVS     r1,#1                 ;141
00002e  024c              LSLS     r4,r1,#9              ;141
000030  4620              MOV      r0,r4                 ;141
000032  f7fff7ff          BL       RCC_APB2PeriphResetCmd
000036  4620              MOV      r0,r4                 ;143
000038  e8bde8bd          POP      {r4,lr}               ;143
00003c  2100              MOVS     r1,#0                 ;143
00003e  f7fff7ff          B.W      RCC_APB2PeriphResetCmd
                  |L1.66|
000042  2101              MOVS     r1,#1                 ;148
000044  4620              MOV      r0,r4                 ;148
000046  f7fff7ff          BL       RCC_APB2PeriphResetCmd
00004a  4620              MOV      r0,r4                 ;150
00004c  e8bde8bd          POP      {r4,lr}               ;150
000050  2100              MOVS     r1,#0                 ;150
000052  f7fff7ff          B.W      RCC_APB2PeriphResetCmd
                  |L1.86|
;;;158          break; 
;;;159    
;;;160        default:
;;;161          break;
;;;162      }
;;;163    }
000056  bd10              POP      {r4,pc}
;;;164    
                          ENDP

                  ADC_Init PROC
;;;176    void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
;;;177    {
000058  b510              PUSH     {r4,lr}
;;;178      u32 tmpreg1 = 0;
;;;179      u8 tmpreg2 = 0;
;;;180    
;;;181      /* Check the parameters */
;;;182      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;183      assert_param(IS_ADC_MODE(ADC_InitStruct->ADC_Mode));
;;;184      assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode));
;;;185      assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode));  		    
;;;186      assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv));   
;;;187      assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign)); 
;;;188      assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfChannel));
;;;189    
;;;190      /*---------------------------- ADCx CR1 Configuration -----------------*/
;;;191      /* Get the ADCx CR1 value */
;;;192      tmpreg1 = ADCx->CR1;
00005a  6842              LDR      r2,[r0,#4]
;;;193      /* Clear DUALMOD and SCAN bits */
;;;194      tmpreg1 &= CR1_CLEAR_Mask;
00005c  4bbb              LDR      r3,|L1.844|
00005e  401a              ANDS     r2,r2,r3
;;;195      /* Configure ADCx: Dual mode and scan conversion mode */
;;;196      /* Set DUALMOD bits according to ADC_Mode value */
;;;197      /* Set SCAN bit according to ADC_ScanConvMode value */
;;;198      tmpreg1 |= (u32)(ADC_InitStruct->ADC_Mode | ((u32)ADC_InitStruct->ADC_ScanConvMode << 8));
000060  790c              LDRB     r4,[r1,#4]
000062  680b              LDR      r3,[r1,#0]
000064  ea42ea42          ORR      r2,r2,r4,LSL #8
000068  4313              ORRS     r3,r3,r2
;;;199      /* Write to ADCx CR1 */
;;;200      ADCx->CR1 = tmpreg1;
00006a  6043              STR      r3,[r0,#4]
;;;201    
;;;202      /*---------------------------- ADCx CR2 Configuration -----------------*/
;;;203      /* Get the ADCx CR2 value */
;;;204      tmpreg1 = ADCx->CR2;
00006c  6882              LDR      r2,[r0,#8]
;;;205      /* Clear CONT, ALIGN and EXTSEL bits */
;;;206      tmpreg1 &= CR2_CLEAR_Mask;
00006e  4bb8              LDR      r3,|L1.848|
000070  401a              ANDS     r2,r2,r3
;;;207      /* Configure ADCx: external trigger event and continuous conversion mode */
;;;208      /* Set ALIGN bit according to ADC_DataAlign value */
;;;209      /* Set EXTSEL bits according to ADC_ExternalTrigConv value */
;;;210      /* Set CONT bit according to ADC_ContinuousConvMode value */
;;;211      tmpreg1 |= (u32)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv |
000072  e9d1e9d1          LDRD     r4,r3,[r1,#8]
000076  4323              ORRS     r3,r3,r4
000078  794c              LDRB     r4,[r1,#5]
00007a  ea42ea42          ORR      r2,r2,r4,LSL #1
00007e  4313              ORRS     r3,r3,r2
;;;212                ((u32)ADC_InitStruct->ADC_ContinuousConvMode << 1));
;;;213      /* Write to ADCx CR2 */
;;;214      ADCx->CR2 = tmpreg1;
000080  6083              STR      r3,[r0,#8]
;;;215    
;;;216      /*---------------------------- ADCx SQR1 Configuration -----------------*/
;;;217      /* Get the ADCx SQR1 value */
;;;218      tmpreg1 = ADCx->SQR1;
000082  6ac2              LDR      r2,[r0,#0x2c]
;;;219      /* Clear L bits */
;;;220      tmpreg1 &= SQR1_CLEAR_Mask;
000084  f422f422          BIC      r2,r2,#0xf00000
;;;221      /* Configure ADCx: regular channel sequence length */
;;;222      /* Set L bits according to ADC_NbrOfChannel value */
;;;223      tmpreg2 |= (ADC_InitStruct->ADC_NbrOfChannel - 1);
000088  7c09              LDRB     r1,[r1,#0x10]
00008a  1e49              SUBS     r1,r1,#1
00008c  b2c9              UXTB     r1,r1
;;;224      tmpreg1 |= ((u32)tmpreg2 << 20);
00008e  ea42ea42          ORR      r1,r2,r1,LSL #20
;;;225      /* Write to ADCx SQR1 */
;;;226      ADCx->SQR1 = tmpreg1;
000092  62c1              STR      r1,[r0,#0x2c]
;;;227    }
000094  bd10              POP      {r4,pc}
;;;228    
                          ENDP

                  ADC_StructInit PROC
;;;240      /* Initialize the ADC_Mode member */
;;;241      ADC_InitStruct->ADC_Mode = ADC_Mode_Independent;
000096  2100              MOVS     r1,#0
000098  6001              STR      r1,[r0,#0]
;;;242    
;;;243      /* initialize the ADC_ScanConvMode member */
;;;244      ADC_InitStruct->ADC_ScanConvMode = DISABLE;
00009a  7101              STRB     r1,[r0,#4]
;;;245    
;;;246      /* Initialize the ADC_ContinuousConvMode member */
;;;247      ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
00009c  7141              STRB     r1,[r0,#5]
;;;248    
;;;249      /* Initialize the ADC_ExternalTrigConv member */
;;;250      ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
00009e  6081              STR      r1,[r0,#8]
;;;251    
;;;252      /* Initialize the ADC_DataAlign member */
;;;253      ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
0000a0  60c1              STR      r1,[r0,#0xc]
;;;254    
;;;255      /* Initialize the ADC_NbrOfChannel member */
;;;256      ADC_InitStruct->ADC_NbrOfChannel = 1;
0000a2  2101              MOVS     r1,#1
0000a4  7401              STRB     r1,[r0,#0x10]
;;;257    }
0000a6  4770              BX       lr
;;;258    
                          ENDP

                  ADC_Cmd PROC
;;;273    
;;;274      if (NewState != DISABLE)
0000a8  b121              CBZ      r1,|L1.180|
;;;275      {
;;;276        /* Set the ADON bit to wake up the ADC from power down mode */
;;;277        ADCx->CR2 |= CR2_ADON_Set;
0000aa  6881              LDR      r1,[r0,#8]
0000ac  f041f041          ORR      r1,r1,#1
0000b0  6081              STR      r1,[r0,#8]
;;;278      }
;;;279      else
;;;280      {
;;;281        /* Disable the selected ADC peripheral */
;;;282        ADCx->CR2 &= CR2_ADON_Reset;
;;;283      }
;;;284    }
0000b2  4770              BX       lr
                  |L1.180|
0000b4  6881              LDR      r1,[r0,#8]            ;282
0000b6  f021f021          BIC      r1,r1,#1              ;282
0000ba  6081              STR      r1,[r0,#8]            ;282
0000bc  4770              BX       lr
;;;285    
                          ENDP

                  ADC_DMACmd PROC
;;;301    
;;;302      if (NewState != DISABLE)
0000be  b121              CBZ      r1,|L1.202|
;;;303      {
;;;304        /* Enable the selected ADC DMA request */
;;;305        ADCx->CR2 |= CR2_DMA_Set;
0000c0  6881              LDR      r1,[r0,#8]
0000c2  f441f441          ORR      r1,r1,#0x100
0000c6  6081              STR      r1,[r0,#8]
;;;306      }
;;;307      else
;;;308      {
;;;309        /* Disable the selected ADC DMA request */
;;;310        ADCx->CR2 &= CR2_DMA_Reset;
;;;311      }
;;;312    }
0000c8  4770              BX       lr
                  |L1.202|
0000ca  6881              LDR      r1,[r0,#8]            ;310
0000cc  f421f421          BIC      r1,r1,#0x100          ;310
0000d0  6081              STR      r1,[r0,#8]            ;310
0000d2  4770              BX       lr
;;;313    
                          ENDP

                  ADC_ITConfig PROC
;;;338      /* Get the ADC IT index */
;;;339      itmask = (u8)ADC_IT;
0000d4  b2c9              UXTB     r1,r1
;;;340    
;;;341      if (NewState != DISABLE)
0000d6  b11a              CBZ      r2,|L1.224|
;;;342      {
;;;343        /* Enable the selected ADC interrupts */
;;;344        ADCx->CR1 |= itmask;
0000d8  6842              LDR      r2,[r0,#4]
0000da  430a              ORRS     r2,r2,r1
0000dc  6042              STR      r2,[r0,#4]
;;;345      }
;;;346      else
;;;347      {
;;;348        /* Disable the selected ADC interrupts */
;;;349        ADCx->CR1 &= (~(u32)itmask);
;;;350      }
;;;351    }
0000de  4770              BX       lr
                  |L1.224|
0000e0  6842              LDR      r2,[r0,#4]            ;349
0000e2  438a              BICS     r2,r2,r1              ;349
0000e4  6042              STR      r2,[r0,#4]            ;349
0000e6  4770              BX       lr
;;;352    
                          ENDP

                  ADC_ResetCalibration PROC
;;;365      /* Resets the selected ADC calibartion registers */  
;;;366      ADCx->CR2 |= CR2_RSTCAL_Set;
0000e8  6881              LDR      r1,[r0,#8]
0000ea  f041f041          ORR      r1,r1,#8
0000ee  6081              STR      r1,[r0,#8]
;;;367    }
0000f0  4770              BX       lr
;;;368    
                          ENDP

                  ADC_GetResetCalibrationStatus PROC
;;;376    FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx)
;;;377    {
0000f2  4601              MOV      r1,r0
;;;378      FlagStatus bitstatus = RESET;
0000f4  2000              MOVS     r0,#0
;;;379