qy2_bit.h

电动车电流流量计显示程序. 单片机根据采样电阻采得电流后通过数码管显示当前电流是多少安培.

/***********************************************************************
 * HEADER_START                                                        *
 *                                                                     *
 *      Name:           qt2_bit.h                                     *
 *      Project:        Sensorless BLDC Motor HC08                     *
 *      Description:    RAM global variables                           *
 *      Processor:      HC08MR32/24                                    *
 *      HW:                                                            *
 *      Revision:       0.1                                            *
 *      Date:           25th July 2002                                 *
 *      Compiler:       METROWERKS ANSI-C/cC++ Compiler for HC08       *
 *                                                        V-5.0.12 ICG *
 *      Author:         Libor Prokop, Leos Chalupa                     *
 *      Company:        Motorola SPS                                   *
 *                      Roznov System Application Laboratory           *
 *                      Roznov pod Radhostem, Czech Republic           *
 *      Security:       General Business Information                   *
 *                                                                     *
 * =================================================================== *
 * Copyright (c):      MOTOROLA Inc.,2002, All rights reserved.        *
 *                                                                     *
 * =================================================================== *
 * THIS SOFTWARE IS PROVIDED BY MOTOROLA RSAL "AS IS" AND ANY          *
 * EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE *
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR  *
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL MOTOROLA RSAL OR         *
 * ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,    *
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT        *
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;        *
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)            *
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, *
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)       *
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED *
 * OF THE POSSIBILITY OF SUCH DAMAGE.                                  *
 * =================================================================== *
 *
 * HEADER_END
 */
#ifndef _QY2_BIT_H
#define _QY2_BIT_H

/******************************************************************************/
/*              REGISTERS FLAG/WORDS UNIONS DEFINITIONS                       */
/******************************************************************************/
typedef union 
{
  struct
    {
     unsigned int PTA0    : 1;  /* BIT0 */
     unsigned int PTA1    : 1;  /* BIT1 */
     unsigned int PTA2    : 1;  /* BIT2 */
     unsigned int PTA3    : 1;  /* BIT3 */
     unsigned int PTA4    : 1;  /* BIT4 */
     unsigned int PTA5    : 1;  /* BIT5 */
     unsigned int AWUL    : 1;  /* BIT6 */
     unsigned int         : 1;  /* BIT7 Reserved */
    } B; 
                /* PORTA Bits Definition */
  char R;   
} PORTA_Def;	 /* PORTA register Definition */

typedef union 
{
  struct
    {
     unsigned int PTB0    : 1;  /* BIT0 */
     unsigned int PTB1    : 1;  /* BIT1 */
     unsigned int PTB2    : 1;  /* BIT2 */
     unsigned int PTB3    : 1;  /* BIT3 */
     unsigned int PTB4    : 1;  /* BIT4 */
     unsigned int PTB5    : 1;  /* BIT5 */
     unsigned int PTB6    : 1;  /* BIT6 */
     unsigned int PTB7    : 1;  /* BIT7  */
    } B; 
                /* PORTB Bits Definition */
  unsigned char R;   
} PORTB_Def;

typedef union 
{
  struct {
    unsigned int DDRA0       :1;                                       /* Data Direction Register A Bit 0 */
    unsigned int DDRA1       :1;                                       /* Data Direction Register A Bit 1 */
    unsigned int             :1;
    unsigned int DDRA3       :1;                                       /* Data Direction Register A Bit 3 */
    unsigned int DDRA4       :1;                                       /* Data Direction Register A Bit 4 */
    unsigned int DDRA5       :1;                                       /* Data Direction Register A Bit 5 */
    unsigned int             :1;
    unsigned int             :1;
  } B;
  char R;       /* DDRA Bits Definition */
}DDRA_Def;      /* DDRA register Definition */

							      

/*** PTAPUE - Input Pull-Up Enable Register PTAPUE; 0x0000000B ***/
typedef union {
  struct {
    unsigned int PTAPUE0     :1;                                       /* Pull-Up Enable bit 0, Port A */
    unsigned int PTAPUE1     :1;                                       /* Pull-Up Enable bit 1, Port A */
    unsigned int PTAPUE2     :1;                                       /* Pull-Up Enable bit 2, Port A */
    unsigned int PTAPUE3     :1;                                       /* Pull-Up Enable bit 3, Port A */
    unsigned int PTAPUE4     :1;                                       /* Pull-Up Enable bit 4, Port A */
    unsigned int PTAPUE5     :1;                                       /* Pull-Up Enable bit 5, Port A */
    unsigned int             :1;
    unsigned int OSC2EN      :1;                                       /* Enable PTA4 on OSC2 Pin */
  } B;
  char R;        /* PTAPUE Bits Definition */
} PTAPUE_Def;    /* PTAPUE register Definition */    


/*** PTAPUE - Input Pull-Up Enable Register PTAPUE; 0x0000000B ***/
typedef union {
  struct {
    unsigned int PTBPUE0     :1;                                       /* Pull-Up Enable bit 0, Port B */
    unsigned int PTBPUE1     :1;                                       /* Pull-Up Enable bit 1, Port B */
    unsigned int PTBPUE2     :1;                                       /* Pull-Up Enable bit 2, Port B */
    unsigned int PTBPUE3     :1;                                       /* Pull-Up Enable bit 3, Port B */
    unsigned int PTBPUE4     :1;                                       /* Pull-Up Enable bit 4, Port B */
    unsigned int PTBPUE5     :1;                                       /* Pull-Up Enable bit 5, Port B */
    unsigned int PTBPUE6     :1;									   /* Pull-Up Enable bit 6, Port B */
    unsigned int PTBPUE7     :1;                                       /* Pull-Up Enable bit 7, Port B */
  } B;
  char R;        /* PTAPUE Bits Definition */
} PTBPUE_Def;    /* PTAPUE register Definition */    


typedef union {
  struct {
    unsigned int MODE1       :1;                                       /* IRQ Edge/Level Select Bit */
    unsigned int IMASK1      :1;                                       /* IRQ1 Interrupt Mask Bit */
    unsigned int ACK1        :1;                                       /* IRQ1 Interrupt Request Acknowledge Bit */
    unsigned int IRQF1       :1;                                       /* IRQ1 Flag Bit */
    unsigned int             :1;
    unsigned int             :1;
    unsigned int             :1;
    unsigned int             :1;
  } B;
  char R;           /* INTSCR Bits Definitioin */
} INTSCR_Def;       /* INTSCR register Definitioin */

/*** CONFIG2 - Configuration Register 2; 0x0000001E ***/
typedef union {
  struct {
    unsigned int RSTEN       :1;                                       /* RST Pin Function Selection */
    unsigned int             :1;
    unsigned int             :1;
    unsigned int OSCOPT0     :1;                                       /* Selection Bits for Oscillator Option 0 */
    unsigned int OSCOPT1     :1;                                       /* Selection Bits for Oscillator Option 1 */
    unsigned int             :1;
    unsigned int IRQEN       :1;                                       /* IRQ Pin Function Selection Bit */
    unsigned int IRQPUD      :1;                                       /* IRQ Pin Pullup Control Bit */
  } B;
  char R;           /* Config2 Bits Definitioin */
}CONFIG2_Def;       /* Config2 register Definitioin */    

/*** CONFIG1 - Configuration Register 2; 0x0000001F ***/
typedef union {
  struct {
    unsigned int COPD        :1;                                       /* COP Disable Bit */
    unsigned int STOP        :1;                                       /* STOP Instruction Enable Bit */
    unsigned int SSREC       :1;                                       /* Short Stop Recovery Bit */
    unsigned int LVI5OR3     :1;                                       /* LVI 5-V or 3-V Operating Mode Bit */
    unsigned int LVIPWRD     :1;                                       /* Low Voltage Inhibit Power Disable Bit */
    unsigned int LVIRSTD     :1;                                       /* Low Voltage Inhibit Reset Disable Bit */
    unsigned int LVISTOP     :1;                                       /* LVI Enable in Stop Mode Bit */
    unsigned int COPRS       :1;                                       /* COP Reset Period Selection Bit */
  } B;
  char R;           /* Config1 Bits Definitioin */
}CONFIG1_Def;       /* Config1 register Definitioin */    

/*** TSC - TIM Status and Control Register TSC; 0x00000020 ***/
typedef union {
  struct {
    unsigned int PS0         :1;                                       /* Prescaler Select Bit 0 */
    unsigned int PS1         :1;                                       /* Prescaler Select Bit 1 */
    unsigned int PS2         :1;                                       /* Prescaler Select Bit 2 */
    unsigned int             :1;
    unsigned int TRST        :1;                                       /* TIM Reset Bit */
    unsigned int TSTOP       :1;                                       /* TIM Stop Bit */
    unsigned int TOIE        :1;                                       /* TIM Overflow Interrupt Enable Bit */
    unsigned int TOF         :1;                                       /* TIM Overflow Flag Bit */
  } B;              
  char R;           /* TSC Bits Definitioin */
}TSC_Def;     		/* TSC register Definition */


typedef union 
{
  struct
    {
     unsigned int CH0MAX  : 1;  /* BIT0 Channel #0 Maximum Duty Cycle Bit*/
     unsigned int TOV0    : 1;  /* BIT1 Toggle-On-Overflov */
     unsigned int ELS0A   : 1;  /* BIT2 Edge/Level Select Bit */
     unsigned int ELS0B   : 1;  /* BIT3 Edge/Level Select Bit */
     unsigned int MS0A    : 1;  /* BIT4 Mode Select Bit A */
     unsigned int MS0B    : 1;  /* BIT5 Mode Select Bit A */
     unsigned int CH0IE   : 1;  /* BIT6 Channel #0 Interrupt Enable Bit */
     unsigned int CH0F    : 1;  /* BIT7 Channel #0 Flag Bit */
    } B; 
                /*  TASC0 Timer  Bits Definition */
  char R;   
} TSC0_Def;	 /*  TASC0 Timer register Definition */

typedef union 
{
  struct
    {    
     unsigned int CH1MAX  : 1;  /* BIT0 Channel #1 Maximum Duty Cycle Bit*/
     unsigned int TOV1    : 1;  /* BIT1 Toggle-On-Overflov */
     unsigned int ELS1A   : 1;  /* BIT2 Edge/Level Select Bit */
     unsigned int ELS1B   : 1;  /* BIT3 Edge/Level Select Bit */
     unsigned int MS1A    : 1;  /* BIT4 Mode Select Bit A */
     unsigned int BIT5    : 1;  /* BIT5 Mode Select Bit A */
     unsigned int CH1IE   : 1;  /* BIT6 Channel #1 Interrupt Enable Bit */
     unsigned int CH1F    : 1;  /* BIT7 Channel #1 Flag Bit */
    } B; 
                /*  TASC1 Timer  Bits Definition */
  char R;   
} TSC1_Def;	 /*  TASC1 Timer  register Definition */


/*** ADSCR - ADC Status and Control Register; 0x0000003C ***/
typedef union 
{
  struct
    {       
     unsigned int ADCH0   : 1;  /* BIT0 ADC channel select bit #0 */
     unsigned int ADCH1   : 1;  /* BIT1 ADC channel select bit #1 */
     unsigned int ADCH2   : 1;  /* BIT2 ADC channel select bit #2 */
     unsigned int ADCH3   : 1;  /* BIT3 ADC channel select bit #3 */
     unsigned int ADCH4   : 1;  /* BIT4 ADC channel select bit #4 */
     unsigned int ADCO    : 1;  /* BIT5 ADC continuous conversion*/
     unsigned int AIEN    : 1;  /* BIT6 ADC interrupt enable*/
     unsigned int COCO    : 1;  /* BIT7 conversion complete
                                        interrupt dma select */
    } B;                 
  char R;        /* ADSCR Bits Definition */
} ADSCR_Def;	 /* ADSCR register Definition */

/*** ADICLK - ADC Input Clock Register; 0x0000003F ***/
typedef union {
  struct {
    unsigned int             :1;
    unsigned int             :1;
    unsigned int             :1;
    unsigned int             :1;
    unsigned int             :1;
    unsigned int ADIV0       :1;                                       /* ADC Clock Prescaler Bit 0 */
    unsigned int ADIV1       :1;                                       /* ADC Clock Prescaler Bit 1 */
    unsigned int ADIV2       :1;                                       /* ADC Clock Prescaler Bit 2 */
  } B;          
  char R;           /* ADICLK Bits Definition */
}ADICLK_Def;         /* ADICLK register Definition */


#endif /* _QT2_BIT_H */