tablec.asm

十七种模拟器源代码 非常有用的作课程设计不可缺少的

;Copyright (C) 1997-2001 ZSNES Team ( [e-mail] / [e-mail] )
;
;This program is free software; you can redistribute it and/or
;modify it under the terms of the GNU General Public License
;as published by the Free Software Foundation; either
;version 2 of the License, or (at your option) any later
;version.
;
;This program is distributed in the hope that it will be useful,
;but WITHOUT ANY WARRANTY; without even the implied warranty of
;MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
;GNU General Public License for more details.
;
;You should have received a copy of the GNU General Public License
;along with this program; if not, write to the Free Software
;Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

%include "macros.mac"

EXTSYM eramaccessbankr16,eramaccessbankr8,eramaccessbankw16
EXTSYM eramaccessbankw8,memaccessbankr16,memaccessbankr8
EXTSYM memaccessbankw16,memaccessbankw8
EXTSYM mosjmptab,mosdraw10,mosdraw11,mosdraw12,mosdraw13
EXTSYM mosdraw14,mosdraw15,mosdraw16,mosdraw2,mosdraw3
EXTSYM mosdraw4,mosdraw5,mosdraw6,mosdraw7,mosdraw8
EXTSYM mosdraw9,ngpalcon2b,ngpalcon4b
EXTSYM regaccessbankr16,regaccessbankw16,regaccessbankw8
EXTSYM sramaccessbankr16,sramaccessbankr8,sramaccessbankw16
EXTSYM sramaccessbankw8,tableAc,tableBc,tableCc,tableDc,tableEc
EXTSYM tableFc,tableGc,tableHc,wramaccessbankr16
EXTSYM wramaccessbankr8,wramaccessbankw16,wramaccessbankw8,tableadc

NEWSYM TableCAsmStart
%include "cpu/65816dc.inc"
%include "cpu/address.inc"
%include "cpu/addrni.inc"
%include "cpu/e65816c.inc"







; global variables

;*******************************************************
; Generate OpCode Table
;*******************************************************

NEWSYM inittablec
    ; set tablead  (NVMXDIZC) (  MXD   )
    push es
    xor ecx,ecx
    xor al,al
    mov cx,256
    mov edi,tableadc
.loopa
    test al,08h ; D flag
    jnz .decon
    test al,10h ; X flag
    jnz .xon
    test al,20h ; M flag
    jnz .mon
    mov esi,tableAc
    jmp .done
.mon
    mov esi,tableBc
    jmp .done

.xon
    test al,20h ; M flag
    jnz .mon2
    mov esi,tableCc
    jmp .done
.mon2
    mov esi,tableDc
    jmp .done

.decon
    test al,10h ; X flag
    jnz .xon3
    test al,20h ; M flag
    jnz .mon3
    mov esi,tableEc
    jmp .done
.mon3
    mov esi,tableFc
    jmp .done

.xon3
    test al,20h
    jnz .mon4
    mov esi,tableGc
    jmp .done
.mon4
    mov esi,tableHc
.done
    inc al
    push eax
    mov eax,esi
    stosd
    pop eax
    loop .loopa

    ; Set CPU addresses
    ; First, set all addresses to invalid
    mov eax,eopINVALID
    mov edi,tableAc
    mov ecx,256
    rep stosd
    mov edi,tableBc
    mov ecx,256
    rep stosd
    mov edi,tableCc
    mov ecx,256
    rep stosd
    mov edi,tableDc
    mov ecx,256
    rep stosd
    mov edi,tableEc
    mov ecx,256
    rep stosd
    mov edi,tableFc
    mov ecx,256
    rep stosd
    mov edi,tableGc
    mov ecx,256
    rep stosd
    mov edi,tableHc
    mov ecx,256
    rep stosd
    mov edi,tableAc
    call settables
    mov edi,tableBc
    call settables
    mov edi,tableCc
    call settables
    mov edi,tableDc
    call settables
    mov edi,tableEc
    call settables
    mov edi,tableFc
    call settables
    mov edi,tableGc
    call settables
    mov edi,tableHc
    call settables

    ; set proper functions
    mov edi,tableAc              ; Table addresses (M:0,X:0,D:0)
    call settablem16
    mov edi,tableAc
    call settablex16

    mov edi,tableBc              ; Table addresses (M:1,X:0,D:0)
    call settablex16

    mov edi,tableCc              ; Table addresses (M:0,X:1,D:0)
    call settablem16

    mov edi,tableEc              ; Table addresses (M:0,X:0,D:1)
    call settablem16
    mov edi,tableEc
    call settableDm16
    mov edi,tableEc
    call settablex16

    mov edi,tableFc              ; Table addresses (M:1,X:0,D:1)
    call settablex16
    mov edi,tableFc
    call settableDm8

    mov edi,tableGc              ; Table addresses (M:0,X:1,D:1)
    call settablem16
    mov edi,tableGc
    call settableDm16

    mov edi,tableHc              ; Table addresses (M:1,X:1,D:1)
    call settableDm8
    pop es
    ret

eopINVALID
    ret

;*******************************************************
; Set Tables     Sets the opcode tables according to EDI
;*******************************************************
; This function sets all the non-multiple entries
settables:
    ;row 0
    mov dword[edi+00h*4],COp00
    mov dword[edi+01h*4],COp01m8
    mov dword[edi+02h*4],COp02
    mov dword[edi+03h*4],COp03m8
    mov dword[edi+04h*4],COp04m8
    mov dword[edi+05h*4],COp05m8
    mov dword[edi+06h*4],COp06m8
    mov dword[edi+07h*4],COp07m8
    mov dword[edi+08h*4],COp08
    mov dword[edi+09h*4],COp09m8
    mov dword[edi+0Ah*4],COp0Am8
    mov dword[edi+0Bh*4],COp0B
    mov dword[edi+0Ch*4],COp0Cm8
    mov dword[edi+0Dh*4],COp0Dm8
    mov dword[edi+0Eh*4],COp0Em8
    mov dword[edi+0Fh*4],COp0Fm8
    mov dword[edi+10h*4],COp10
    mov dword[edi+11h*4],COp11m8
    mov dword[edi+12h*4],COp12m8
    mov dword[edi+13h*4],COp13m8
    mov dword[edi+14h*4],COp14m8
    mov dword[edi+15h*4],COp15m8
    mov dword[edi+16h*4],COp16m8
    mov dword[edi+17h*4],COp17m8
    mov dword[edi+18h*4],COp18
    mov dword[edi+19h*4],COp19m8
    mov dword[edi+1Ah*4],COp1Am8
    mov dword[edi+1Bh*4],COp1B
    mov dword[edi+1Ch*4],COp1Cm8
    mov dword[edi+1Dh*4],COp1Dm8
    mov dword[edi+1Eh*4],COp1Em8
    mov dword[edi+1Fh*4],COp1Fm8
    mov dword[edi+20h*4],COp20
    mov dword[edi+21h*4],COp21m8
    mov dword[edi+22h*4],COp22
    mov dword[edi+23h*4],COp23m8
    mov dword[edi+24h*4],COp24m8
    mov dword[edi+25h*4],COp25m8
    mov dword[edi+26h*4],COp26m8
    mov dword[edi+27h*4],COp27m8
    mov dword[edi+28h*4],COp28
    mov dword[edi+29h*4],COp29m8
    mov dword[edi+2Ah*4],COp2Am8
    mov dword[edi+2Bh*4],COp2B
    mov dword[edi+2Ch*4],COp2Cm8
    mov dword[edi+2Dh*4],COp2Dm8
    mov dword[edi+2Eh*4],COp2Em8
    mov dword[edi+2Fh*4],COp2Fm8
    mov dword[edi+30h*4],COp30
    mov dword[edi+31h*4],COp31m8
    mov dword[edi+32h*4],COp32m8
    mov dword[edi+33h*4],COp33m8
    mov dword[edi+34h*4],COp34m8
    mov dword[edi+35h*4],COp35m8
    mov dword[edi+36h*4],COp36m8
    mov dword[edi+37h*4],COp37m8
    mov dword[edi+38h*4],COp38
    mov dword[edi+39h*4],COp39m8
    mov dword[edi+3Ah*4],COp3Am8
    mov dword[edi+3Bh*4],COp3B
    mov dword[edi+3Ch*4],COp3Cm8
    mov dword[edi+3Dh*4],COp3Dm8
    mov dword[edi+3Eh*4],COp3Em8
    mov dword[edi+3Fh*4],COp3Fm8
    mov dword[edi+40h*4],COp40
    mov dword[edi+41h*4],COp41m8
    mov dword[edi+42h*4],COp42
    mov dword[edi+43h*4],COp43m8
    mov dword[edi+44h*4],COp44
    mov dword[edi+45h*4],COp45m8
    mov dword[edi+46h*4],COp46m8
    mov dword[edi+47h*4],COp47m8
    mov dword[edi+48h*4],COp48m8
    mov dword[edi+49h*4],COp49m8
    mov dword[edi+4Ah*4],COp4Am8
    mov dword[edi+4Bh*4],COp4B
    mov dword[edi+4Ch*4],COp4C
    mov dword[edi+4Dh*4],COp4Dm8
    mov dword[edi+4Eh*4],COp4Em8
    mov dword[edi+4Fh*4],COp4Fm8
    mov dword[edi+50h*4],COp50
    mov dword[edi+51h*4],COp51m8
    mov dword[edi+52h*4],COp52m8
    mov dword[edi+53h*4],COp53m8
    mov dword[edi+54h*4],COp54
    mov dword[edi+55h*4],COp55m8
    mov dword[edi+56h*4],COp56m8
    mov dword[edi+57h*4],COp57m8
    mov dword[edi+58h*4],COp58
    mov dword[edi+59h*4],COp59m8
    mov dword[edi+5Ah*4],COp5Ax8
    mov dword[edi+5Bh*4],COp5B
    mov dword[edi+5Ch*4],COp5C
    mov dword[edi+5Dh*4],COp5Dm8
    mov dword[edi+5Eh*4],COp5Em8
    mov dword[edi+5Fh*4],COp5Fm8
    mov dword[edi+60h*4],COp60
    mov dword[edi+61h*4],COp61m8nd
    mov dword[edi+62h*4],COp62
    mov dword[edi+63h*4],COp63m8nd
    mov dword[edi+64h*4],COp64m8
    mov dword[edi+65h*4],COp65m8nd
    mov dword[edi+66h*4],COp66m8
    mov dword[edi+67h*4],COp67m8nd
    mov dword[edi+68h*4],COp68m8
    mov dword[edi+69h*4],COp69m8nd
    mov dword[edi+6Ah*4],COp6Am8
    mov dword[edi+6Bh*4],COp6B
    mov dword[edi+6Ch*4],COp6C
    mov dword[edi+6Dh*4],COp6Dm8nd
    mov dword[edi+6Eh*4],COp6Em8
    mov dword[edi+6Fh*4],COp6Fm8nd
    mov dword[edi+70h*4],COp70
    mov dword[edi+71h*4],COp71m8nd
    mov dword[edi+72h*4],COp72m8nd
    mov dword[edi+73h*4],COp73m8nd
    mov dword[edi+74h*4],COp74m8
    mov dword[edi+75h*4],COp75m8nd
    mov dword[edi+76h*4],COp76m8
    mov dword[edi+77h*4],COp77m8nd
    mov dword[edi+78h*4],COp78
    mov dword[edi+79h*4],COp79m8nd
    mov dword[edi+7Ah*4],COp7Ax8
    mov dword[edi+7Bh*4],COp7B
    mov dword[edi+7Ch*4],COp7C
    mov dword[edi+7Dh*4],COp7Dm8nd
    mov dword[edi+7Eh*4],COp7Em8
    mov dword[edi+7Fh*4],COp7Fm8nd
    mov dword[edi+80h*4],COp80
    mov dword[edi+81h*4],COp81m8
    mov dword[edi+82h*4],COp82
    mov dword[edi+83h*4],COp83m8
    mov dword[edi+84h*4],COp84x8
    mov dword[edi+85h*4],COp85m8
    mov dword[edi+86h*4],COp86x8
    mov dword[edi+87h*4],COp87m8
    mov dword[edi+88h*4],COp88x8
    mov dword[edi+89h*4],COp89m8
    mov dword[edi+8Ah*4],COp8Am8
    mov dword[edi+8Bh*4],COp8B
    mov dword[edi+8Ch*4],COp8Cx8
    mov dword[edi+8Dh*4],COp8Dm8
    mov dword[edi+8Eh*4],COp8Ex8
    mov dword[edi+8Fh*4],COp8Fm8
    mov dword[edi+90h*4],COp90
    mov dword[edi+91h*4],COp91m8
    mov dword[edi+92h*4],COp92m8
    mov dword[edi+93h*4],COp93m8
    mov dword[edi+94h*4],COp94x8
    mov dword[edi+95h*4],COp95m8
    mov dword[edi+96h*4],COp96x8
    mov dword[edi+97h*4],COp97m8
    mov dword[edi+98h*4],COp98m8
    mov dword[edi+99h*4],COp99m8
    mov dword[edi+9Ah*4],COp9A
    mov dword[edi+9Bh*4],COp9Bx8
    mov dword[edi+9Ch*4],COp9Cm8
    mov dword[edi+9Dh*4],COp9Dm8
    mov dword[edi+9Eh*4],COp9Em8
    mov dword[edi+9Fh*4],COp9Fm8
    mov dword[edi+0A0h*4],COpA0x8
    mov dword[edi+0A1h*4],COpA1m8
    mov dword[edi+0A2h*4],COpA2x8
    mov dword[edi+0A3h*4],COpA3m8
    mov dword[edi+0A4h*4],COpA4x8
    mov dword[edi+0A5h*4],COpA5m8
    mov dword[edi+0A6h*4],COpA6x8
    mov dword[edi+0A7h*4],COpA7m8
    mov dword[edi+0A8h*4],COpA8x8
    mov dword[edi+0A9h*4],COpA9m8
    mov dword[edi+0AAh*4],COpAAx8