📄 fxemu2.asm
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;Copyright (C) 1997-2001 ZSNES Team ( zsknight@zsnes.com / _demo_@zsnes.com )
;
;This program is free software; you can redistribute it and/or
;modify it under the terms of the GNU General Public License
;as published by the Free Software Foundation; either
;version 2 of the License, or (at your option) any later
;version.
;
;This program is distributed in the hope that it will be useful,
;but WITHOUT ANY WARRANTY; without even the implied warranty of
;MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;GNU General Public License for more details.
;
;You should have received a copy of the GNU General Public License
;along with this program; if not, write to the Free Software
;Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
%include "macros.mac"
EXTSYM FxTable,FxTableb,FxTablec,FxTabled,SfxMemTable,flagnz,fxbit01,fxbit23
EXTSYM fxxand,sfx128lineloc,sfx160lineloc,sfx192lineloc,sfxobjlineloc
EXTSYM sfxramdata,fxbit45,fxbit67,SFXProc,ChangeOps
EXTSYM PLOTJmpa,PLOTJmpb
NEWSYM FxEmu2AsmStart
%include "chips/fxemu2.mac"
; * Optimise PLOT, COLOR!
SECTION .text
NEWSYM FlushCache
; Copy 512 bytes from pb:eax to SfxCACHERAM
ret
SECTION .data
NEWSYM tempsfx, db 0,0,0
ALIGN32
; FxChip emulation by _Demo_
; Optimised by zsKnight
; based on fxemu by lestat
NEWSYM SfxR0, dd 0 ; default source/destination register
NEWSYM SfxR1, dd 0 ; pixel plot X position register
NEWSYM SfxR2, dd 0 ; pixel plot Y position register
NEWSYM SfxR3, dd 0 ;
NEWSYM SfxR4, dd 0 ; lower 16 bit result of lmult
NEWSYM SfxR5, dd 0 ;
NEWSYM SfxR6, dd 0 ; multiplier for fmult and lmult
NEWSYM SfxR7, dd 0 ; fixed point texel X position for merge
NEWSYM SfxR8, dd 0 ; fixed point texel Y position for merge
NEWSYM SfxR9, dd 0 ;
NEWSYM SfxR10, dd 0 ;
NEWSYM SfxR11, dd 0 ; return address set by link
NEWSYM SfxR12, dd 0 ; loop counter
NEWSYM SfxR13, dd 0 ; loop point address
NEWSYM SfxR14, dd 0 ; rom address for getb, getbh, getbl, getbs
NEWSYM SfxR15, dd 0 ; program counter
NEWSYM SfxSFR, dd 0 ; status flag register (16bit)
;SFR status flag register bits:
; 0 -
; 1 Z Zero flag
; 2 CY Carry flag
; 3 S Sign flag
; 4 OV Overflow flag
; 5 G Go flag (set to 1 when the GSU is running)
; 6 R Set to 1 when reading ROM using R14 address
; 7 -
; 8 ALT1 Mode set-up flag for the next instruction
; 9 ALT2 Mode set-up flag for the next instruction
;10 IL Immediate lower 8-bit flag
;11 IH Immediate higher 8-bit flag
;12 B Set to 1 when the WITH instruction is executed
;13 -
;14 -
;15 IRQ Set to 1 when GSU caused an interrupt
; Set to 0 when read by 658c16
NEWSYM SfxBRAMR, dd 0 ; backup ram read only on/off (8bit)
NEWSYM SfxPBR, dd 0 ; program bank register (8bit)
NEWSYM SfxROMBR, dd 0 ; rom bank register (8bit)
NEWSYM SfxCFGR, dd 0 ; control flags register (8bit)
NEWSYM SfxSCBR, dd 0 ; screen bank register (8bit)
NEWSYM SfxCLSR, dd 0 ; clock speed register (8bit)
NEWSYM SfxSCMR, dd 0 ; screen mode register (8bit)
NEWSYM SfxVCR, dd 0 ; version code register (8bit)
NEWSYM SfxRAMBR, dd 0 ; ram bank register (8bit)
NEWSYM SfxCBR, dd 0 ; cache base register (16bit)
NEWSYM SfxCOLR, dd 0 ; Internal color register
NEWSYM SfxPOR, dd 0 ; Plot option register
NEWSYM SfxCacheFlags, dd 0 ; Saying what parts of the cache was written to
NEWSYM SfxLastRamAdr, dd 0 ; Last RAM address accessed
NEWSYM SfxDREG, dd 0 ; Current destination register index
NEWSYM SfxSREG, dd 0 ; Current source register index
NEWSYM SfxRomBuffer, dd 0 ; Current byte read by R14
NEWSYM SfxPIPE, dd 0 ; Instructionset pipe
NEWSYM SfxPipeAdr, dd 0 ; The address of where the pipe was read from
NEWSYM SfxnRamBanks, dd 4 ; Number of 64kb-banks in FxRam (Don't confuse it with SNES-Ram!!!)
NEWSYM SfxnRomBanks, dd 0 ; Number of 32kb-banks in Cart-ROM
NEWSYM SfxvScreenHeight, dd 0 ; 128, 160 or 192
NEWSYM SfxvScreenSize, dd 0
NEWSYM SfxCacheActive, dd 0 ; Cache Active
NEWSYM SfxCarry, dd 0 ; Carry flag
NEWSYM SfxSignZero, dd 0 ; Sign and Zero flag
NEWSYM SfxB, dd 0 ; B flag (1 when with instruction executed)
NEWSYM SfxOverflow, dd 0 ; Overflow flag
NEWSYM SfxCACHERAM, times 512 db 0 ; 512 bytes of GSU cache memory
SECTION .data
num2writesfxreg equ $-SfxR0
; pharos equ hack *sigh*
NEWSYM PHnum2writesfxreg, dd num2writesfxreg
NEWSYM SfxCPB, dd 0
NEWSYM SfxCROM, dd 0
NEWSYM SfxRAMMem, dd 0
NEWSYM withr15sk, dd 0
NEWSYM sfxclineloc, dd 0
NEWSYM SCBRrel, dd 0
NEWSYM fxbit01pcal, dd 0
NEWSYM fxbit23pcal, dd 0
NEWSYM fxbit45pcal, dd 0
NEWSYM fxbit67pcal, dd 0
;SfxRAM times 256*1024 db 0
; If we need this later...
SECTION .text
NEWSYM FxOp00 ; STOP stop GSU execution (and maybe generate an IRQ) ; Verified.
FETCHPIPE
mov [SfxPIPE],cl
and dword [SfxSFR],0FFFFh-32 ; Clear Go flag (set to 1 when the GSU is running)
test dword [SfxCFGR],080h ; Check if the interrupt generation is on
jnz .NoIRQ
or dword [SfxSFR],08000h ; Set IRQ Flag
.NoIRQ
CLRFLAGS
inc ebp
mov eax,[NumberOfOpcodes]
add eax,0F0000000h
add [ChangeOps],eax
mov dword [NumberOfOpcodes],1
mov dword[SFXProc],0
xor cl,cl
ret
NEWSYM FxOp01 ; NOP no operation ; Verified.
FETCHPIPE
CLRFLAGS
inc ebp ; Increase program counter
ret
NEWSYM FxOp02 ; CACHE reintialize GSU cache
mov eax,ebp
FETCHPIPE
sub eax,[SfxCPB]
and eax,0FFF0h
cmp dword [SfxCBR],eax
je .SkipUpdate
cmp byte [SfxCacheActive],1
je .SkipUpdate
mov dword [SfxCBR],eax
mov dword [SfxCacheActive],1
call FlushCache
.SkipUpdate
CLRFLAGS
inc ebp ; Increase program counter
ret
NEWSYM FxOp03 ; LSR logic shift right ; Verified.
mov eax,[esi] ; Read Source
FETCHPIPE
mov [SfxCarry],al
and byte[SfxCarry],1
shr ax,1 ; logic shift right
inc ebp ; Increase program counter
mov [edi],eax ; Write Destination
mov dword [SfxSignZero],eax
CLRFLAGS
ret
NEWSYM FxOp04 ; ROL rotate left (RCL?) ; V
shr byte[SfxCarry],1
mov eax,[esi] ; Read Source
FETCHPIPE
rcl ax,1
rcl byte[SfxCarry],1
inc ebp ; Increase program counter
mov [edi],eax ; Write Destination
mov [SfxSignZero],eax
CLRFLAGS
ret
NEWSYM FxOp05 ; BRA branch always ; Verified.
movsx eax,byte[ebp]
mov cl,[ebp+1]
inc ebp
add ebp,eax
call [FxTable+ecx*4]
ret
NEWSYM FxOp06 ; BGE branch on greater or equals ; Verified.
movsx eax,byte[ebp]
mov ebx,[SfxSignZero]
shr ebx,15
inc ebp
xor bl,[SfxOverflow]
mov cl,[ebp]
test bl,01h
jnz .nojump
add ebp,eax
call [FxTable+ecx*4]
ret
.nojump
inc ebp
call [FxTable+ecx*4]
ret
NEWSYM FxOp07 ; BLT branch on lesss than ; Verified.
movsx eax,byte[ebp]
mov ebx,[SfxSignZero]
shr ebx,15
inc ebp
xor bl,[SfxOverflow]
mov cl,[ebp]
test bl,01h
jz .nojump
add ebp,eax
call [FxTable+ecx*4]
ret
.nojump
inc ebp
call [FxTable+ecx*4]
ret
NEWSYM FxOp08 ; BNE branch on not equal ; Verified.
movsx eax,byte[ebp]
inc ebp
test dword[SfxSignZero],0FFFFh
mov cl,[ebp]
jz .nojump
add ebp,eax
call [FxTable+ecx*4]
ret
.nojump
inc ebp
call [FxTable+ecx*4]
ret
NEWSYM FxOp09 ; BEQ branch on equal (z=1) ; Verified.
movsx eax,byte[ebp]
inc ebp
test dword[SfxSignZero],0FFFFh
mov cl,[ebp]
jnz .nojump
add ebp,eax
call [FxTable+ecx*4]
ret
.nojump
inc ebp
call [FxTable+ecx*4]
ret
NEWSYM FxOp0A ; BPL branch on plus ; Verified.
movsx eax,byte[ebp]
inc ebp
test dword[SfxSignZero],088000h
mov cl,[ebp]
jnz .nojump
add ebp,eax
call [FxTable+ecx*4]
ret
.nojump
inc ebp
call [FxTable+ecx*4]
ret
NEWSYM FxOp0B ; BMI branch on minus ; Verified.
movsx eax,byte[ebp]
inc ebp
test dword[SfxSignZero],088000h
mov cl,[ebp]
jz .nojump
add ebp,eax
call [FxTable+ecx*4]
ret
.nojump
inc ebp
call [FxTable+ecx*4]
ret
NEWSYM FxOp0C ; BCC branch on carry clear ; Verified.
movsx eax,byte[ebp]
inc ebp
test byte[SfxCarry],01h
mov cl,[ebp]
jnz .nojump
add ebp,eax
call [FxTable+ecx*4]
ret
.nojump
inc ebp
call [FxTable+ecx*4]
ret
NEWSYM FxOp0D ; BCS branch on carry set ; Verified.
movsx eax,byte[ebp]
inc ebp
test byte[SfxCarry],01h
mov cl,[ebp]
jz .nojump
add ebp,eax
call [FxTable+ecx*4]
ret
.nojump
inc ebp
call [FxTable+ecx*4]
ret
NEWSYM FxOp0E ; BVC branch on overflow clear ; Verified.
movsx eax,byte[ebp]
inc ebp
test byte[SfxOverflow],01h
mov cl,[ebp]
jnz .nojump
add ebp,eax
call [FxTable+ecx*4]
ret
.nojump
inc ebp
call [FxTable+ecx*4]
ret
NEWSYM FxOp0F ; BVS branch on overflow set ; Verified.
movsx eax,byte[ebp]
inc ebp
test byte[SfxOverflow],01h
mov cl,[ebp]
jz .nojump
add ebp,eax
call [FxTable+ecx*4]
ret
.nojump
inc ebp
call [FxTable+ecx*4]
ret
NEWSYM FxOp10 ; TO RN set register n as destination register
TORN 0
NEWSYM FxOp11 ; TO RN set register n as destination register
TORN 1
NEWSYM FxOp12 ; TO RN set register n as destination register
TORN 2
NEWSYM FxOp13 ; TO RN set register n as destination register
TORN 3
NEWSYM FxOp14 ; TO RN set register n as destination register
TORN 4
NEWSYM FxOp15 ; TO RN set register n as destination register
TORN 5
NEWSYM FxOp16 ; TO RN set register n as destination register
TORN 6
NEWSYM FxOp17 ; TO RN set register n as destination register
TORN 7
NEWSYM FxOp18 ; TO RN set register n as destination register
TORN 8
NEWSYM FxOp19 ; TO RN set register n as destination register
TORN 9
NEWSYM FxOp1A ; TO RN set register n as destination register
TORN 10
NEWSYM FxOp1B ; TO RN set register n as destination register
TORN 11
NEWSYM FxOp1C ; TO RN set register n as destination register
TORN 12
NEWSYM FxOp1D ; TO RN set register n as destination register
TORN 13
NEWSYM FxOp1E ; TO RN set register n as destination register
FETCHPIPE
mov edi,SfxR0+14*4
inc ebp
call [FxTable+ecx*4]
mov edi,SfxR0
UpdateR14
ret
NEWSYM FxOp1F ; TO RN set register n as destination register
FETCHPIPE
mov edi,SfxR0+15*4
inc ebp
call [FxTable+ecx*4]
mov ebp,[SfxCPB]
add ebp,[SfxR15]
mov edi,SfxR0
ret
NEWSYM FxOp20 ; WITH set register n as source and destination register
WITH 0
NEWSYM FxOp21 ; WITH set register n as source and destination register
WITH 1
NEWSYM FxOp22 ; WITH set register n as source and destination register
WITH 2
NEWSYM FxOp23 ; WITH set register n as source and destination register
WITH 3
NEWSYM FxOp24 ; WITH set register n as source and destination register
WITH 4
NEWSYM FxOp25 ; WITH set register n as source and destination register
WITH 5
NEWSYM FxOp26 ; WITH set register n as source and destination register
WITH 6
NEWSYM FxOp27 ; WITH set register n as source and destination register
WITH 7
NEWSYM FxOp28 ; WITH set register n as source and destination register
WITH 8
NEWSYM FxOp29 ; WITH set register n as source and destination register
WITH 9
NEWSYM FxOp2A ; WITH set register n as source and destination register
WITH 10
NEWSYM FxOp2B ; WITH set register n as source and destination register
WITH 11
NEWSYM FxOp2C ; WITH set register n as source and destination register
WITH 12
NEWSYM FxOp2D ; WITH set register n as source and destination register
WITH 13
NEWSYM FxOp2E ; WITH set register n as source and destination register
FETCHPIPE
mov esi,SfxR0+14*4
mov edi,SfxR0+14*4
mov dword [SfxB],1
inc ebp
call [FxTablec+ecx*4]
mov dword [SfxB],0 ; Clear B Flag
mov esi,SfxR0
mov edi,SfxR0
UpdateR14
ret
NEWSYM FxOp2F ; WITH set register n as source and destination register
FETCHPIPE
mov esi,SfxR0+15*4
mov edi,SfxR0+15*4
mov dword [SfxB],1
inc ebp
mov eax,ebp
sub eax,[SfxCPB]
mov dword[withr15sk],0
mov [SfxR15],eax
call [FxTableb+ecx*4]
cmp dword[withr15sk],1
je .skip
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