upl.c

十七种模拟器源代码 非常有用的作课程设计不可缺少的

   RAMSize    = 0x10000+0x10000+0x2000+0x10;

   if(!(RAM=AllocateMem(RAMSize))) return;

   RAM2       = RAM+0x10000;
   RAM_VIDEO  = RAM+0x10000+0x10000;

   if(!(TMP =AllocateMem(0x28000))) return;

   if(!load_rom("arkarea.008",TMP+0x00000,0x08000)) return;	// Z80 MAIN ROM *
   if(!load_rom("arkarea.009",TMP+0x08000,0x08000)) return;	// Z80 MAIN ROM
   if(!load_rom("arkarea.010",TMP+0x10000,0x08000)) return;	// Z80 MAIN ROM
   if(!load_rom("arkarea.011",TMP+0x18000,0x08000)) return;	// Z80 MAIN ROM
   if(!load_rom("arkarea.012",TMP+0x20000,0x08000)) return;	// Z80 MAIN ROM

   // Skip Idle Z80

   TMP[0x043A]=0xD3;  // OUTA (AAh)
   TMP[0x043B]=0xAA;  //

   SetStopZ80BMode2(0x043C);

   init_bank_rom(TMP,ROM,2);

   memset(RAM+0x00000, 0x00, 0x10000);
   memset(RAM+0x0F800, 0xFF, 0x00010);
   memcpy(RAM, TMP, 0x8000+0x4000);

   AddZ80BROMBase(RAM, 0x0010, 0x0066);

   AddZ80BReadByte(0x0000, 0xBFFF, NULL,			NULL);		// Z80 ROM/BANK ROM
   AddZ80BReadByte(0xC000, 0xF7FF, NULL,			RAM+0xC000);	// RAM/OBJECT/BG0/FG0/COL
   AddZ80BReadByte(0xF800, 0xF80F, NULL,			RAM+0xF800);	// INPUT
   AddZ80BReadByte(0x0000, 0xFFFF, DefBadReadZ80,		NULL);		// <bad reads>
   AddZ80BReadByte(-1, -1, NULL, NULL);

   AddZ80BWriteByte(0xC000, 0xF7FF, NULL,			RAM+0xC000);	// RAM/OBJECT/BG0/FG0/COL
   AddZ80BWriteByte(0xFA02, 0xFA02, UPLBankWrite,		NULL);		// ROM BANK
   AddZ80BWriteByte(0xFA00, 0xFA00, UPLSoundWrite,		NULL);		// SOUND
   AddZ80BWriteByte(0xF900, 0xFFFF, NULL,			RAM+0xF900);	// MISC CTRL
   AddZ80BWriteByte(0x0000, 0xFFFF, DefBadWriteZ80,		NULL);		// <bad writes>
   AddZ80BWriteByte(-1, -1, NULL, NULL);

   AddZ80BReadPort(0x00, 0xFF, DefBadReadZ80,			NULL);		// <bad reads>
   AddZ80BReadPort(-1, -1, NULL, NULL);

   AddZ80BWritePort(0xAA, 0xAA, StopZ80BMode2,			NULL);		// Trap Idle Z80
   AddZ80BWritePort(0x00, 0xFF, DefBadWriteZ80,			NULL);		// <bad writes>
   AddZ80BWritePort(-1, -1, NULL, NULL);

   AddZ80BInit();

   if(!load_rom("arkarea.013",ROM2+0x00000,0x8000)) return;	// Z80 SUB ROM

   // Skip Idle Z80

   ROM2[0x00B2]=0xD3;  // OUTA (AAh)
   ROM2[0x00B3]=0xAA;  //

   SetStopZ80CMode2(0x00B2);

   memset(RAM2+0x00000, 0x00, 0x10000);
   memcpy(RAM2, ROM2, 0x8000);

   AddZ80CROMBase(RAM2, 0x0038, 0x0066);

   AddZ80CReadByte(0x0000, 0xC7FF, NULL,			RAM2+0x0000);	// Z80 ROM/BANK ROM/RAM
   AddZ80CReadByte(0xE000, 0xE000, UPLSoundRead,		NULL);		// SOUND
   AddZ80CReadByte(0x0000, 0xFFFF, DefBadReadZ80,		NULL);		// <bad reads>
   AddZ80CReadByte(-1, -1, NULL, NULL);

   AddZ80CWriteByte(0xC000, 0xC7FF, NULL,			RAM2+0xC000);	// RAM
   AddZ80CWriteByte(0x0000, 0xFFFF, DefBadWriteZ80,		NULL);		// <bad writes>
   AddZ80CWriteByte(-1, -1, NULL, NULL);

   AddZ80CReadPort(0x00, 0x01, YM2203AReadZ80,			NULL);		// YM2203#1
   AddZ80CReadPort(0x80, 0x81, YM2203BReadZ80,			NULL);		// YM2203#2
   AddZ80CReadPort(0x00, 0xFF, DefBadReadZ80,			NULL);		// <bad reads>
   AddZ80CReadPort(-1, -1, NULL, NULL);

   AddZ80CWritePort(0x00, 0x01, YM2203AWriteZ80,		NULL);		// YM2203#1
   AddZ80CWritePort(0x80, 0x81, YM2203BWriteZ80,		NULL);		// YM2203#2
   AddZ80CWritePort(0xAA, 0xAA, StopZ80CMode2,			NULL);		// Trap Idle Z80
   AddZ80CWritePort(0x00, 0xFF, DefBadWriteZ80,			NULL);		// <bad writes>
   AddZ80CWritePort(-1, -1, NULL, NULL);

   AddZ80CInit();

   FreeMem(TMP);

   /*-----------------------*/

   if(!(TMP=AllocateMem(0x080000))) return;

   if(!load_rom("arkarea.004", TMP+0x8000, 0x8000)) return;    // 8x8 FG0 TILES *
   for(ta=0;ta<0x2000;ta++){
      TMP[ta+ta+0x0000]=TMP[ta+0x08000];	// Interleave
      TMP[ta+ta+0x0001]=TMP[ta+0x0A000];
      TMP[ta+ta+0x4000]=TMP[ta+0x0C000];	// Interleave
      TMP[ta+ta+0x4001]=TMP[ta+0x0E000];
   }
   if(!MS1DecodeFG0(TMP,0x08000))return;

   if(!load_rom("arkarea.007", TMP+0x40000, 0x10000)) return;  // 16x16 SPR *
   if(!load_rom("arkarea.006", TMP+0x50000, 0x10000)) return;  // 16x16 SPR *
   if(!load_rom("arkarea.005", TMP+0x60000, 0x10000)) return;  // 16x16 BG0 *
   for(ta=0;ta<0x4000;ta++){
      TMP[ta+ta+0x00000]=TMP[ta+0x40000];	// Interleave
      TMP[ta+ta+0x00001]=TMP[ta+0x44000];
      TMP[ta+ta+0x08000]=TMP[ta+0x48000];	// Interleave
      TMP[ta+ta+0x08001]=TMP[ta+0x4C000];
      TMP[ta+ta+0x10000]=TMP[ta+0x50000];	// Interleave
      TMP[ta+ta+0x10001]=TMP[ta+0x54000];
      TMP[ta+ta+0x18000]=TMP[ta+0x58000];	// Interleave
      TMP[ta+ta+0x18001]=TMP[ta+0x5C000];
      TMP[ta+ta+0x20000]=TMP[ta+0x60000];	// Interleave
      TMP[ta+ta+0x20001]=TMP[ta+0x64000];
      TMP[ta+ta+0x28000]=TMP[ta+0x68000];	// Interleave
      TMP[ta+ta+0x28001]=TMP[ta+0x6C000];
   }
   if(!MS1DecodeSPR(TMP,0x30000))return;

   if(!load_rom("arkarea.003", TMP+0x40000, 0x10000)) return;  // 16x16 BG0 *
   if(!load_rom("arkarea.002", TMP+0x50000, 0x10000)) return;  // 16x16 BG0 *
   if(!load_rom("arkarea.001", TMP+0x60000, 0x10000)) return;  // 16x16 BG0 *
   for(ta=0;ta<0x4000;ta++){
      TMP[ta+ta+0x00000]=TMP[ta+0x40000];	// Interleave
      TMP[ta+ta+0x00001]=TMP[ta+0x44000];
      TMP[ta+ta+0x08000]=TMP[ta+0x48000];	// Interleave
      TMP[ta+ta+0x08001]=TMP[ta+0x4C000];
      TMP[ta+ta+0x10000]=TMP[ta+0x50000];	// Interleave
      TMP[ta+ta+0x10001]=TMP[ta+0x54000];
      TMP[ta+ta+0x18000]=TMP[ta+0x58000];	// Interleave
      TMP[ta+ta+0x18001]=TMP[ta+0x5C000];
      TMP[ta+ta+0x20000]=TMP[ta+0x60000];	// Interleave
      TMP[ta+ta+0x20001]=TMP[ta+0x64000];
      TMP[ta+ta+0x28000]=TMP[ta+0x68000];	// Interleave
      TMP[ta+ta+0x28001]=TMP[ta+0x6C000];
   }
   if(!MS1DecodeBG0(TMP,0x30000))return;

   FreeMem(TMP);

   InitPaletteMap(RAM+0xF000, 0x40, 0x10, 0x1000);

   set_colour_mapper(&col_map_rrrr_gggg_bbbb_xxxx_68k);

   AddLoadCallback(UPLLoadUpdate);

   AddSaveData(SAVE_USER_0, (UINT8 *) &Z80Bank,             sizeof(Z80Bank));
   AddSaveData(SAVE_USER_1, (UINT8 *) &sound_byte,          sizeof(sound_byte));

   // Init Video Hardware
   // -------------------

   bg_layers[0].RAM      = RAM+0xE000;
   bg_layers[0].SCR      = RAM+0xFA08;
   bg_layers[0].GFX      = GFX_BG0;
   bg_layers[0].MASK     = BG0_Mask;
   bg_layers[0].col_bank = 0x00;
   bg_layers[0].type     = BG_FLIP_X;

   bg_layers[1].RAM      = NULL;

   bg_layers[2].RAM      = NULL;

   RAM_FG0 = RAM+0xE800;
   mask_fg0 = 0x20;

   RAM_SPR = RAM+0xDA00;
   mask_spr = 0x10;
}

void clear_ark_area(void)
{
   #ifdef RAINE_DEBUG
      save_debug("RAM.bin", RAM, RAMSize, 0);
   #endif
}

void LoadOmegaFighter(void)
{
   UINT8 *TMP;

   romset=3;
   Z80BankCount=0x40000/0x4000;

   if(!(ROM=AllocateMem(0xC000*Z80BankCount))) return;
   if(!(ROM2=AllocateMem(0x10000))) return;

   RAMSize    = 0x10000+0x10000+(0x2000*4)+0x10;

   if(!(RAM=AllocateMem(RAMSize))) return;

   RAM2       = RAM+0x10000;
   RAM_VIDEO  = RAM+0x10000+0x10000;

   if(!(TMP =AllocateMem(0x40000))) return;

   if(!load_rom_index(4,TMP+0x00000,0x20000)) return;	// Z80 MAIN ROM *
   if(!load_rom_index(5,TMP+0x20000,0x20000)) return;	// Z80 MAIN ROM

   // Fix Input Protection

   TMP[0x029a]=0x00;
   TMP[0x029b]=0x00;

   TMP[0x02a6]=0x00;
   TMP[0x02a7]=0x00;

   TMP[0x02b2]=0xC9;

   TMP[0x02b5]=0xC9;

   TMP[0x02c9]=0xC9;

   TMP[0x02f6]=0xC9;

   TMP[0x05f0]=0x00;

   TMP[0x054c]=0x04;

   TMP[0x0557]=0x03;

   // Fix ROM Checksum

   TMP[0x0b8d]=0x00;
   TMP[0x0b8e]=0x00;
   TMP[0x0b8f]=0x00;

   if(is_current_game("omegaf")){

   // Skip Idle Z80

   TMP[0x1cd1]=0xd9;
   TMP[0x1cd2]=0x05;

   TMP[0x05d9]=0xD3;  // OUTA (AAh)
   TMP[0x05da]=0xAA;  //

   TMP[0x05db]=0xc3;
   TMP[0x05dc]=0xcc;
   TMP[0x05dd]=0x1c;

   TMP[0x06d8]=0xD3;  // OUTA (AAh)
   TMP[0x06d9]=0xAA;  //
   TMP[0x06da]=0x00;  //

   }
   else{

   // Skip Idle Z80

   TMP[0x1cae]=0xd9;
   TMP[0x1caf]=0x05;

   TMP[0x05d9]=0xD3;  // OUTA (AAh)
   TMP[0x05da]=0xAA;  //

   TMP[0x05db]=0xc3;
   TMP[0x05dc]=0xa9;
   TMP[0x05dd]=0x1c;

   TMP[0x06d8]=0xD3;  // OUTA (AAh)
   TMP[0x06d9]=0xAA;  //
   TMP[0x06da]=0x00;  //

   }
   init_bank_rom(TMP,ROM,0);

   memset(RAM+0x00000, 0x00, 0x10000);
   //memset(RAM+0x0C000, 0xFF, 0x00010);
   memcpy(RAM, TMP, 0x8000+0x4000);

   AddZ80BROMBase(RAM, 0x0010, 0x0066);

   AddZ80BReadByte(0x0000, 0xBFFF, NULL,			NULL);		// Z80 ROM/BANK ROM
   AddZ80BReadByte(0xD000, 0xFFFF, NULL,			RAM+0xD000);	// COLOR/FG0/BG0/RAM/OBJECT
   AddZ80BReadByte(0xC400, 0xCFFF, OmegaBG012Read,		NULL);		// BG0-2 RAM
   AddZ80BReadByte(0xC000, 0xC00F, NULL,			RAM+0xC000);	// INPUT
   AddZ80BReadByte(0xC100, 0xC3FF, NULL,			RAM+0xC100);	// INPUT
   AddZ80BReadByte(0x0000, 0xFFFF, DefBadReadZ80,		NULL);		// <bad reads>
   AddZ80BReadByte(-1, -1, NULL, NULL);

   AddZ80BWriteByte(0xD000, 0xFFFF, NULL,			RAM+0xD000);	// COLOR/FG0/BG0/RAM/OBJECT
   AddZ80BWriteByte(0xC400, 0xCFFF, OmegaBG012Write,		NULL);		// BG0-2 RAM
   AddZ80BWriteByte(0xC002, 0xC002, UPLBankWrite,		NULL);		// ROM BANK
   AddZ80BWriteByte(0xC000, 0xC000, UPLSoundWrite,		NULL);		// SOUND
   AddZ80BWriteByte(0xC105, 0xC105, OmegaBG0BankWrite,		NULL);		// BG0 BANK
   AddZ80BWriteByte(0xC205, 0xC205, OmegaBG1BankWrite,		NULL);		// BG1 BANK
   AddZ80BWriteByte(0xC305, 0xC305, OmegaBG2BankWrite,		NULL);		// BG2 BANK
   AddZ80BWriteByte(0xC100, 0xC3FF, NULL,			RAM+0xC100);	// MISC CTRL
   AddZ80BWriteByte(0x0000, 0xFFFF, DefBadWriteZ80,		NULL);		// <bad writes>
   AddZ80BWriteByte(-1, -1, NULL, NULL);

   AddZ80BReadPort(0x00, 0xFF, DefBadReadZ80,			NULL);		// <bad reads>
   AddZ80BReadPort(-1, -1, NULL, NULL);

   AddZ80BWritePort(0xAA, 0xAA, StopZ80,			NULL);		// Trap Idle Z80
   AddZ80BWritePort(0x00, 0xFF, DefBadWriteZ80,			NULL);		// <bad writes>
   AddZ80BWritePort(-1, -1, NULL, NULL);

   AddZ80BInit();

   if(!load_rom("7.7m",ROM2+0x00000,0x10000)) return;	// Z80 SUB ROM

   // Skip Idle Z80
   // -------------

   ROM2[0x00B2]=0xD3;  // OUTA (AAh)
   ROM2[0x00B3]=0xAA;  //

   SetStopZ80CMode2(0x00B2);

   memset(RAM2+0x00000, 0x00, 0x10000);
   memcpy(RAM2, ROM2, 0x8000+0x4000);

   AddZ80CROMBase(RAM2, 0x0038, 0x0066);

   AddZ80CReadByte(0x0000, 0xC7FF, NULL,			RAM2+0x0000);	// Z80 ROM/BANK ROM/RAM
   AddZ80CReadByte(0xE000, 0xE000, UPLSoundRead,		NULL);		// SOUND
   AddZ80CReadByte(0x0000, 0xFFFF, DefBadReadZ80,		NULL);		// <bad reads>
   AddZ80CReadByte(-1, -1, NULL, NULL);

   AddZ80CWriteByte(0xC000, 0xC7FF, NULL,			RAM2+0xC000);	// RAM
   AddZ80CWriteByte(0x0000, 0xFFFF, DefBadWriteZ80,		NULL);		// <bad writes>
   AddZ80CWriteByte(-1, -1, NULL, NULL);

   AddZ80CReadPort(0x00, 0x01, YM2203AReadZ80,			NULL);		// YM2203#1
   AddZ80CReadPort(0x80, 0x81, YM2203BReadZ80,			NULL);		// YM2203#2
   AddZ80CReadPort(0x00, 0xFF, DefBadReadZ80,			NULL);		// <bad reads>
   AddZ80CReadPort(-1, -1, NULL, NULL);

   AddZ80CWritePort(0x00, 0x01, YM2203AWriteZ80,		NULL);		// YM2203#1
   AddZ80CWritePort(0x80, 0x81, YM2203BWriteZ80,		NULL);		// YM2203#2
   AddZ80CWritePort(0xAA, 0xAA, StopZ80CMode2,			NULL);		// Trap Idle Z80
   AddZ80CWritePort(0x00, 0xFF, DefBadWriteZ80,			NULL);		// <bad writes>
   AddZ80CWritePort(-1, -1, NULL, NULL);

   AddZ80CInit();

   FreeMem(TMP);

   /*-----------------------*/

   if(!(TMP=AllocateMem(0x80000))) return;

   if(!load_rom("4.18h", TMP+0x00000, 0x08000)) return;    // 8x8 FG0 TILES *
   if(!MS1DecodeFG0(TMP,0x08000))return;

   if(!load_rom("8.23m", TMP+0x00000, 0x20000)) return;  // 16x16 SPR *
   if(!MS1DecodeSPR_TypeB(TMP,0x20000))return;

   if(!load_rom("1back2.15b", TMP+0x00000, 0x80000)) return;  // 16x16 BG0 *
   if(!MS1DecodeBG1_TypeB(TMP,0x80000))return;

   if(!load_rom("2back1.27b", TMP+0x00000, 0x80000)) return;  // 16x16 BG0 *
   if(!MS1DecodeBG0_TypeB(TMP,0x80000))return;

   if(!load_rom("3back3.5f", TMP+0x00000, 0x80000)) return;  // 16x16 BG0 *
   if(!MS1DecodeBG2_TypeB(TMP,0x80000))return;

   FreeMem(TMP);

   OmegaBG012Init();

   InitPaletteMap(RAM+0xD800, 0x40, 0x10, 0x1000);

   set_colour_mapper(&col_map_rrrr_gggg_bbbb_xxxx_68k);

   AddLoadCallback(UPLLoadUpdate);

   AddSaveData(SAVE_USER_0, (UINT8 *) &Z80Bank,             sizeof(Z80Bank));
   AddSaveData(SAVE_USER_1, (UINT8 *) &sound_byte,          sizeof(sound_byte));

   // Init Video Hardware
   // -------------------

   bg_layers[0].RAM      = RAM_VIDEO+0x2000;
   bg_layers[0].SCR      = RAM+0xC100;
   bg_layers[0].GFX      = GFX_BG0;
   bg_layers[0].MASK     = BG0_Mask;
   bg_layers[0].col_bank = 0x00;
   bg_layers[0].type     = BG_FLIP_NONE;

   bg_layers[1].RAM      = RAM_VIDEO+0x4000;
   bg_layers[1].SCR      = RAM+0xC200;
   bg_layers[1].GFX      = GFX_BG1;
   bg_layers[1].MASK     = BG1_Mask;
   bg_layers[1].col_bank = 0x00;
   bg_layers[1].type     = BG_FLIP_NONE;

   bg_layers[2].RAM      = RAM_VIDEO+0x6000;
   bg_layers[2].SCR      = RAM+0xC300;
   bg_layers[2].GFX      = GFX_BG2;
   bg_layers[2].MASK     = BG2_Mask;
   bg_layers[2].col_bank = 0x00;
   bg_layers[2].type     = BG_FLIP_NONE;

   RAM_FG0 = RAM+0xD000;
   mask_fg0 = 0x30;

   RAM_SPR = RAM+0xFA00;
   mask_spr = 0x20;
}

void ClearOmegaFighter(void)
{
   #ifdef RAINE_DEBUG
      save_debug("RAM.bin", RAM, RAMSize, 0);
   #endif
}

void ExecuteUPLFrame(void)
{
  static int fix_omega;

  // Interrupt Fix (most likely mz80 doesn't correctly emulate interrupts)

  cpu_get_pc(CPU_Z80_2);
  if(romset==3){
    if(Z