newcpu.c

十七种模拟器源代码 非常有用的作课程设计不可缺少的

//
// UAE 68020 - RAINE VERSION
//

#include "68020.h"
//#include "config.h"
#include "m68k.h"

#include "newcpu.h"
#include "newmem.h"
#include "readcpu.h"

#include "raine.h"
#include "savegame.h"
#include "debug.h"

int areg_byteinc[8] = { 1,1,1,1,1,1,1,2 };
int imm8_table[8] = { 8,1,2,3,4,5,6,7 };
int movem_index1[0x100];
int movem_index2[0x100];
int movem_next[0x100];

#define FAST020
extern void DoCycles(void);

cpuop_func *cpufunctbl[0x10000];

extern cpuop_func CPU_OP_NAME(_illegal_jedi);

UINT32 cycles;
/* static */ UINT8 *cyclepos;

extern void Init020_00(void);
extern void Init020_01(void);
extern void Init020_02(void);
extern void Init020_03(void);
extern void Init020_04(void);
extern void Init020_05(void);
extern void Init020_06(void);
extern void Init020_07(void);
extern void Init020_08(void);
extern void Init020_09(void);
extern void Init020_0a(void);
extern void Init020_0b(void);
extern void Init020_0c(void);
extern void Init020_0d(void);
extern void Init020_0e(void);
extern void Init020_0f(void);

void InitJedi(void)
{
   Init020_00();
   Init020_01();
   Init020_02();
   Init020_03();
   Init020_04();
   Init020_05();
   Init020_06();
   Init020_07();
   Init020_08();
   Init020_09();
   Init020_0a();
   Init020_0b();
   Init020_0c();
   Init020_0d();
   Init020_0e();
   Init020_0f();
}

static DEF_INLINE UINT16 table020(UINT16 ta)
{
   return(((ta&0xFF)<<8)|((ta>>8)&0xFF));
}

#ifdef FAST020
/*#if !defined( RAINE_WIN32 )
#warning FAST020
#endif*/

//static unsigned long smc;

#ifdef RAINE_DOS
// Now defined in asm02x.s - but i didn't fix that yet!!! :p [Antiriad 20001107]

void DoCycles(void)
{
   asm("
	subl	$8,%%esp

	movl	_ROM,%%eax
	movl	%%eax,SMC1-4

	movl	%%esp,_cyclepos

	movl	_cycles,%%eax
	movl	%%eax,(%%esp)

	movl	$SMC2,%%eax
	movl	%%eax,4(%%esp)

	movl	_regs+88,%%ebx
	xorl	%%eax,%%eax
	movw	0x2164334A(%%ebx),%%ax
SMC1:
	movl	_cpufunctbl(,%%eax,4),%%ebx
	rolw	$8,%%ax
	jmp	*%%ebx
SMC2:
	"
	:
	:
	: "%eax","%ebx","%ecx","%edx","%esi","%edi","%ebp"
   );
}
#endif

#else

void DoCycles(void)
{
   UINT32 opcode;
   do{
      opcode=get_iword(0);
      (*cpufunctbl[opcode])(opcode);
      opcode=get_iword(0);
      (*cpufunctbl[opcode])(opcode);
      opcode=get_iword(0);
      (*cpufunctbl[opcode])(opcode);
      opcode=get_iword(0);
      (*cpufunctbl[opcode])(opcode);
   }
   while((cycles-=4)>0);
}

#endif

#if !defined( RAINE_WIN32 ) && !defined(__MINGW32__)
DEF_INLINE void Execute68020(int c)
#else
void Execute68020(int c)
#endif
{
   cycles=(c>>4);
#if defined(RAINE_DOS) || defined(RAINE_UNIX) || defined(__MINGW32__)
   __asm__ __volatile__ ("pushl %%ebp\n\tcall *%0\n\tpopl %%ebp" : : "r" (DoCycles) : "%eax", "%edx", "%ecx", "memory", "cc");
#else
   {
   UINT32 opcode;
   do{
      opcode=get_iword(0);
      (*cpufunctbl[opcode])(opcode);
      opcode=get_iword(0);
      (*cpufunctbl[opcode])(opcode);
      opcode=get_iword(0);
      (*cpufunctbl[opcode])(opcode);
      opcode=get_iword(0);
      (*cpufunctbl[opcode])(opcode);
   }
   while((cycles-=4)>0);
   }
#endif
}

void U_68020_A_load_update(void)
{
   // I haven't found anything that needs refreshing in here...
}

int MC68020 = 0;

void init_m68k(void)
{
    long int opcode;
    int i,j;

    #ifdef RAINE_DEBUG
    print_debug("Adding U68020...\n");
    #endif

    MC68020 = 1;
    for (i = 0 ; i < 256 ; i++) {
	for (j = 0 ; j < 8 ; j++) {
		if (i & (1 << j)) break;
	}
	movem_index1[i] = j;
	movem_index2[i] = 7-j;
	movem_next[i] = i & (~(1 << j));
    }

    table68k = (struct instr *) AllocateMem (65536 * sizeof (struct instr));

    read_table68k();
    do_merges();

    #ifdef RAINE_DEBUG
    print_debug("%d CPU functions\n", nr_cpuop_funcs);
    #endif

    for(opcode=0;opcode<65536;opcode++){
	cpufunctbl[opcode] = CPU_OP_NAME(_illegal_jedi);
    }

    for (i = 0; op_smalltbl[i].handler != NULL; i++) {
	if (!op_smalltbl[i].specific)
	    cpufunctbl[table020(op_smalltbl[i].opcode)] = op_smalltbl[i].handler;
    }
    for (opcode = 0; opcode < 65536; opcode++) {
	cpuop_func *f;

	if (table68k[opcode].mnemo == i_ILLG)
	    continue;

	if (table68k[opcode].handler != -1) {
	    f = cpufunctbl[table020(table68k[opcode].handler)];
	    if (f == CPU_OP_NAME(_illegal_jedi))
		abort();
	    cpufunctbl[table020(opcode)] = f;
	}
    }
    for (i = 0; op_smalltbl[i].handler != NULL; i++) {
	if (op_smalltbl[i].specific)
	    cpufunctbl[table020(op_smalltbl[i].opcode)] = op_smalltbl[i].handler;
    }

   FreeMem((UINT8 *)table68k);

   InitJedi();

   AddLoadCallback(U_68020_A_load_update);
   AddSaveData(SAVE_M68020_0, (UINT8 *) &regs, sizeof(regs));
}

#if !defined( RAINE_WIN32 ) && !defined(__MINGW32__)
DEF_INLINE void m68k_do_jsr(uaecptr oldpc, uaecptr dest)
#else
void m68k_do_jsr(uaecptr oldpc, uaecptr dest)
#endif
{
   m68k_areg(regs, 7) -= 4;
   put_long(m68k_areg(regs, 7), oldpc);
   m68k_setpc(dest);
}

// MakeSR():
// Generate the 68020 SR register from flags

void MakeSR(void)
{
   regs.sr = (
      (regs.t1      << 15) |
      (regs.t0      << 14) |
      (regs.s       << 13) |
      (regs.m       << 12) |
      (regs.intmask <<  8) |
      (XFLG         <<  4) |
      (NFLG         <<  3) |
      (ZFLG         <<  2) |
      (VFLG         <<  1) |
      (CFLG         <<  0)
   );
}

// MakeFromSR():
// Generate flags from the 68020 SR register

void MakeFromSR(void)
{
   int olds = regs.s;
   int oldm = regs.m;

   regs.t1      = (regs.sr >> 15) & 1;
   regs.t0      = (regs.sr >> 14) & 1;
   regs.s       = (regs.sr >> 13) & 1;
   regs.m       = (regs.sr >> 12) & 1;
   regs.intmask = (regs.sr >>  8) & 7;
   XFLG         = (regs.sr >>  4) & 1;
   NFLG         = (regs.sr >>  3) & 1;
   ZFLG         = (regs.sr >>  2) & 1;
   VFLG         = (regs.sr >>  1) & 1;
   CFLG         = (regs.sr >>  0) & 1;

   if(olds != regs.s){
      if(olds){
         if(oldm)
            regs.msp = m68k_areg(regs, 7);
         else
            regs.isp = m68k_areg(regs, 7);
         m68k_areg(regs, 7) = regs.usp;
      }
      else{
         regs.usp = m68k_areg(regs, 7);
         m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
      }
   }
   else{
      if(olds && oldm != regs.m){
         if(oldm){
            regs.msp = m68k_areg(regs, 7);
            m68k_areg(regs, 7) = regs.isp;
         }
         else{
            regs.isp = m68k_areg(regs, 7);
            m68k_areg(regs, 7) = regs.msp;
         }
      }
   }
}

void Exception(int nr, uaecptr oldpc)
{
    MakeSR();
    if (!regs.s) {
        regs.usp = m68k_areg(regs, 7);
        m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
	regs.s = 1;
    }

	if (nr == 2 || nr == 3) {
	    int i;
	    // @@@ this is probably wrong (?)
	    for (i = 0 ; i < 12 ; i++) {
		m68k_areg(regs, 7) -= 2;
		put_word (m68k_areg(regs, 7), 0);
	    }
	    m68k_areg(regs, 7) -= 2;
	    put_word (m68k_areg(regs, 7), 0xa000 + nr * 4);
	} else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) {
	    m68k_areg(regs, 7) -= 4;
	    put_long (m68k_areg(regs, 7), oldpc);
	    m68k_areg(regs, 7) -= 2;
	    put_word (m68k_areg(regs, 7), 0x2000 + nr * 4);
	} else if (regs.m && nr >= 24 && nr < 32) {
	    m68k_areg(regs, 7) -= 2;
	    put_word (m68k_areg(regs, 7), nr * 4);
	    m68k_areg(regs, 7) -= 4;
	    put_long (m68k_areg(regs, 7), m68k_getpc ());
	    m68k_areg(regs, 7) -= 2;
	    put_word (m68k_areg(regs, 7), regs.sr);
	    regs.sr |= (1 << 13);
	    regs.msp = m68k_areg(regs, 7);
	    m68k_areg(regs, 7) = regs.isp;
	    m68k_areg(regs, 7) -= 2;
	    put_word (m68k_areg(regs, 7), 0x1000 + nr * 4);
	} else {
	    m68k_areg(regs, 7) -= 2;
	    put_word (m68k_areg(regs, 7), nr * 4);
	}

    m68k_areg(regs, 7) -= 4;
    put_long (m68k_areg(regs, 7), m68k_getpc ());
    m68k_areg(regs, 7) -= 2;
    put_word (m68k_areg(regs, 7), regs.sr);
    m68k_setpc(get_long(regs.vbr + 4*nr));
    regs.t1 = regs.t0 = regs.m = 0;
}

DEF_INLINE void Interrupt020(int nr)
{
    if((nr<8) && (nr>=0)){
    Exception(nr+24,0);

    regs.intmask = nr;
    }