cpuemu_01.c

十七种模拟器源代码 非常有用的作课程设计不可缺少的

#include "raine.h"
#include "newmem.h"
#include "readcpu.h"
#include "newcpu.h"
#include "cputbl.h"

#pragma warning( disable : 4702 4100 )

unsigned long op_0_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT8 src = get_ibyte(2);
{
	INT8 dst = m68k_dreg(regs, dstreg);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT8)(src)) == 0);
	SET_NFLG (((INT8)(src)) < 0);
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
}
}
}
m68k_incpc(4);
return 4;
}
unsigned long op_10_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT8 src = get_ibyte(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg);
{
	INT8 dst = cpu_readmem24(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT8)(src)) == 0);
	SET_NFLG (((INT8)(src)) < 0);
	cpu_writemem24(dsta,src);
}
}
}
}
m68k_incpc(4);
return 8;
}
unsigned long op_18_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT8 src = get_ibyte(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg);
{
	INT8 dst = cpu_readmem24(dsta);
	m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT8)(src)) == 0);
	SET_NFLG (((INT8)(src)) < 0);
	cpu_writemem24(dsta,src);
}
}
}
}
m68k_incpc(4);
return 8;
}
unsigned long op_20_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT8 src = get_ibyte(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
{
	INT8 dst = cpu_readmem24(dsta);
	m68k_areg (regs, dstreg) = dsta;
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT8)(src)) == 0);
	SET_NFLG (((INT8)(src)) < 0);
	cpu_writemem24(dsta,src);
}
}
}
}
m68k_incpc(4);
return 9;
}
unsigned long op_28_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT8 src = get_ibyte(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg) + (INT32)(INT16)get_iword(4);
{
	INT8 dst = cpu_readmem24(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT8)(src)) == 0);
	SET_NFLG (((INT8)(src)) < 0);
	cpu_writemem24(dsta,src);
}
}
}
}
m68k_incpc(6);
return 10;
}
unsigned long op_30_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT8 src = get_ibyte(2);
{
m68k_incpc(4);
{
	unsigned int dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword());
{
	INT8 dst = cpu_readmem24(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT8)(src)) == 0);
	SET_NFLG (((INT8)(src)) < 0);
	cpu_writemem24(dsta,src);
}
}
}
}
}
return 11;
}
unsigned long op_38_0(UINT32 opcode) /* OR */
{
	(void)(opcode);
{
{
	INT8 src = get_ibyte(2);
{
	unsigned int dsta = (INT32)(INT16)get_iword(4);
{
	INT8 dst = cpu_readmem24(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT8)(src)) == 0);
	SET_NFLG (((INT8)(src)) < 0);
	cpu_writemem24(dsta,src);
}
}
}
}
m68k_incpc(6);
return 10;
}
unsigned long op_39_0(UINT32 opcode) /* OR */
{
	(void)(opcode);
{
{
	INT8 src = get_ibyte(2);
{
	unsigned int dsta = get_ilong(4);
{
	INT8 dst = cpu_readmem24(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT8)(src)) == 0);
	SET_NFLG (((INT8)(src)) < 0);
	cpu_writemem24(dsta,src);
}
}
}
}
m68k_incpc(8);
return 12;
}
unsigned long op_3c_0(UINT32 opcode) /* ORSR */
{
	(void)(opcode);
{
	MakeSR();
{
	INT16 src = get_iword(2);
	src &= 0xFF;
	regs.sr |= src;
	MakeFromSR();
}
}
m68k_incpc(4);
return 4;
}
unsigned long op_40_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 src = get_iword(2);
{
	INT16 dst = m68k_dreg(regs, dstreg);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT16)(src)) == 0);
	SET_NFLG (((INT16)(src)) < 0);
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
}
}
}
m68k_incpc(4);
return 4;
}
unsigned long op_50_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 src = get_iword(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg);
{
	INT16 dst = cpu_readmem24_word(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT16)(src)) == 0);
	SET_NFLG (((INT16)(src)) < 0);
	cpu_writemem24_word(dsta,src);
}
}
}
}
m68k_incpc(4);
return 8;
}
unsigned long op_58_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 src = get_iword(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg);
{
	INT16 dst = cpu_readmem24_word(dsta);
	m68k_areg(regs, dstreg) += 2;
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT16)(src)) == 0);
	SET_NFLG (((INT16)(src)) < 0);
	cpu_writemem24_word(dsta,src);
}
}
}
}
m68k_incpc(4);
return 8;
}
unsigned long op_60_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 src = get_iword(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg) - 2;
{
	INT16 dst = cpu_readmem24_word(dsta);
	m68k_areg (regs, dstreg) = dsta;
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT16)(src)) == 0);
	SET_NFLG (((INT16)(src)) < 0);
	cpu_writemem24_word(dsta,src);
}
}
}
}
m68k_incpc(4);
return 9;
}
unsigned long op_68_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 src = get_iword(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg) + (INT32)(INT16)get_iword(4);
{
	INT16 dst = cpu_readmem24_word(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT16)(src)) == 0);
	SET_NFLG (((INT16)(src)) < 0);
	cpu_writemem24_word(dsta,src);
}
}
}
}
m68k_incpc(6);
return 10;
}
unsigned long op_70_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 src = get_iword(2);
{
m68k_incpc(4);
{
	unsigned int dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword());
{
	INT16 dst = cpu_readmem24_word(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT16)(src)) == 0);
	SET_NFLG (((INT16)(src)) < 0);
	cpu_writemem24_word(dsta,src);
}
}
}
}
}
return 11;
}
unsigned long op_78_0(UINT32 opcode) /* OR */
{
	(void)(opcode);
{
{
	INT16 src = get_iword(2);
{
	unsigned int dsta = (INT32)(INT16)get_iword(4);
{
	INT16 dst = cpu_readmem24_word(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT16)(src)) == 0);
	SET_NFLG (((INT16)(src)) < 0);
	cpu_writemem24_word(dsta,src);
}
}
}
}
m68k_incpc(6);
return 10;
}
unsigned long op_79_0(UINT32 opcode) /* OR */
{
	(void)(opcode);
{
{
	INT16 src = get_iword(2);
{
	unsigned int dsta = get_ilong(4);
{
	INT16 dst = cpu_readmem24_word(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT16)(src)) == 0);
	SET_NFLG (((INT16)(src)) < 0);
	cpu_writemem24_word(dsta,src);
}
}
}
}
m68k_incpc(8);
return 12;
}
unsigned long op_7c_0(UINT32 opcode) /* ORSR */
{
	(void)(opcode);
{
if (!regs.s) { Exception(8,0); goto endlabel18; }
{
	MakeSR();
{
	INT16 src = get_iword(2);
	regs.sr |= src;
	MakeFromSR();
}
}
}
m68k_incpc(4);
endlabel18: ;
return 4;
}
unsigned long op_80_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT32 src = get_ilong(2);
{
	INT32 dst = m68k_dreg(regs, dstreg);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT32)(src)) == 0);
	SET_NFLG (((INT32)(src)) < 0);
	m68k_dreg(regs, dstreg) = (src);
}
}
}
m68k_incpc(6);
return 6;
}
unsigned long op_90_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT32 src = get_ilong(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg);
{
	INT32 dst = cpu_readmem24_dword(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT32)(src)) == 0);
	SET_NFLG (((INT32)(src)) < 0);
	cpu_writemem24_dword(dsta,src);
}
}
}
}
m68k_incpc(6);
return 14;
}
unsigned long op_98_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT32 src = get_ilong(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg);
{
	INT32 dst = cpu_readmem24_dword(dsta);
	m68k_areg(regs, dstreg) += 4;
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT32)(src)) == 0);
	SET_NFLG (((INT32)(src)) < 0);
	cpu_writemem24_dword(dsta,src);
}
}
}
}
m68k_incpc(6);
return 14;
}
unsigned long op_a0_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT32 src = get_ilong(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg) - 4;
{
	INT32 dst = cpu_readmem24_dword(dsta);
	m68k_areg (regs, dstreg) = dsta;
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT32)(src)) == 0);
	SET_NFLG (((INT32)(src)) < 0);
	cpu_writemem24_dword(dsta,src);
}
}
}
}
m68k_incpc(6);
return 15;
}
unsigned long op_a8_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT32 src = get_ilong(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg) + (INT32)(INT16)get_iword(6);
{
	INT32 dst = cpu_readmem24_dword(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT32)(src)) == 0);
	SET_NFLG (((INT32)(src)) < 0);
	cpu_writemem24_dword(dsta,src);
}
}
}
}
m68k_incpc(8);
return 16;
}
unsigned long op_b0_0(UINT32 opcode) /* OR */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT32 src = get_ilong(2);
{
m68k_incpc(6);
{
	unsigned int dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword());
{
	INT32 dst = cpu_readmem24_dword(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT32)(src)) == 0);
	SET_NFLG (((INT32)(src)) < 0);
	cpu_writemem24_dword(dsta,src);
}
}
}
}
}
return 17;
}
unsigned long op_b8_0(UINT32 opcode) /* OR */
{
	(void)(opcode);
{
{
	INT32 src = get_ilong(2);
{
	unsigned int dsta = (INT32)(INT16)get_iword(6);
{
	INT32 dst = cpu_readmem24_dword(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT32)(src)) == 0);
	SET_NFLG (((INT32)(src)) < 0);
	cpu_writemem24_dword(dsta,src);
}
}
}
}
m68k_incpc(8);
return 16;
}
unsigned long op_b9_0(UINT32 opcode) /* OR */
{
	(void)(opcode);
{
{
	INT32 src = get_ilong(2);
{
	unsigned int dsta = get_ilong(6);
{
	INT32 dst = cpu_readmem24_dword(dsta);
	src |= dst;
	CLEAR_CZNV;
	SET_ZFLG (((INT32)(src)) == 0);
	SET_NFLG (((INT32)(src)) < 0);
	cpu_writemem24_dword(dsta,src);
}
}
}
}
m68k_incpc(10);
return 18;
}
unsigned long op_d0_0(UINT32 opcode) /* CHK2 */
{
	UINT32 dstreg = opcode & 7;
{
	unsigned int oldpc = m68k_getpc();
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg);
	{INT32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
	lower=(INT32)(INT8)cpu_readmem24(dsta); upper = (INT32)(INT8)cpu_readmem24(dsta+1);
	if ((extra & 0x8000) == 0) reg = (INT32)(INT8)reg;
	SET_ZFLG (upper == reg || lower == reg);
	SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);
	if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto endlabel27; }
}
}
}
}
m68k_incpc(4);
endlabel27: ;
return 4;
}
unsigned long op_e8_0(UINT32 opcode) /* CHK2 */
{
	UINT32 dstreg = opcode & 7;
{
	unsigned int oldpc = m68k_getpc();
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg) + (INT32)(INT16)get_iword(4);
	{INT32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
	lower=(INT32)(INT8)cpu_readmem24(dsta); upper = (INT32)(INT8)cpu_readmem24(dsta+1);
	if ((extra & 0x8000) == 0) reg = (INT32)(INT8)reg;
	SET_ZFLG (upper == reg || lower == reg);
	SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);
	if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto endlabel28; }
}
}
}
}
m68k_incpc(6);
endlabel28: ;
return 6;
}
unsigned long op_f0_0(UINT32 opcode) /* CHK2 */
{
	UINT32 dstreg = opcode & 7;
{
	unsigned int oldpc = m68k_getpc();
{
	INT16 extra = get_iword(2);
{
m68k_incpc(4);
{
	unsigned int dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword());
	{INT32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
	lower=(INT32)(INT8)cpu_readmem24(dsta); upper = (INT32)(INT8)cpu_readmem24(dsta+1);
	if ((extra & 0x8000) == 0) reg = (INT32)(INT8)reg;
	SET_ZFLG (upper == reg || lower == reg);
	SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);
	if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto endlabel29; }
}
}
}
}
}
endlabel29: ;
return 7;
}
unsigned long op_f8_0(UINT32 opcode) /* CHK2 */
{
	(void)(opcode);
{
	unsigned int oldpc = m68k_getpc();
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = (INT32)(INT16)get_iword(4);
	{INT32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
	lower=(INT32)(INT8)cpu_readmem24(dsta); upper = (INT32)(INT8)cpu_readmem24(dsta+1);
	if ((extra & 0x8000) == 0) reg = (INT32)(INT8)reg;
	SET_ZFLG (upper == reg || lower == reg);
	SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);
	if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto endlabel30; }
}
}
}
}
m68k_incpc(6);
endlabel30: ;
return 6;
}
unsigned long op_f9_0(UINT32 opcode) /* CHK2 */
{
	(void)(opcode);
{
	unsigned int oldpc = m68k_getpc();
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = get_ilong(4);
	{INT32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
	lower=(INT32)(INT8)cpu_readmem24(dsta); upper = (INT32)(INT8)cpu_readmem24(dsta+1);
	if ((extra & 0x8000) == 0) reg = (INT32)(INT8)reg;
	SET_ZFLG (upper == reg || lower == reg);
	SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);
	if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto endlabel31; }
}
}
}
}
m68k_incpc(8);
endlabel31: ;
return 8;
}
unsigned long op_fa_0(UINT32 opcode) /* CHK2 */
{
	(void)(opcode);
{
	unsigned int oldpc = m68k_getpc();
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = m68k_getpc () + 4;
	dsta += (INT32)(INT16)get_iword(4);
	{INT32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
	lower=(INT32)(INT8)cpu_readmem24(dsta); upper = (INT32)(INT8)cpu_readmem24(dsta+1);
	if ((extra & 0x8000) == 0) reg = (INT32)(INT8)reg;
	SET_ZFLG (upper == reg || lower == reg);