cpuemu_03.c

十七种模拟器源代码 非常有用的作课程设计不可缺少的

	INT16 extra = get_iword(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg);
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	{ UINT32 mask = 1 << (width-1);
	while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}
	m68k_dreg(regs, (extra >> 12) & 7) = offset;
}
}
}
}
m68k_incpc(4);
return 4;
}
unsigned long op_ede8_0(UINT32 opcode) /* BFFFO */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg) + (INT32)(INT16)get_iword(4);
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	{ UINT32 mask = 1 << (width-1);
	while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}
	m68k_dreg(regs, (extra >> 12) & 7) = offset;
}
}
}
}
m68k_incpc(6);
return 6;
}
unsigned long op_edf0_0(UINT32 opcode) /* BFFFO */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 extra = get_iword(2);
{
m68k_incpc(4);
{
	unsigned int dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword());
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	{ UINT32 mask = 1 << (width-1);
	while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}
	m68k_dreg(regs, (extra >> 12) & 7) = offset;
}
}
}
}
}
return 7;
}
unsigned long op_edf8_0(UINT32 opcode) /* BFFFO */
{
{
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = (INT32)(INT16)get_iword(4);
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	{ UINT32 mask = 1 << (width-1);
	while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}
	m68k_dreg(regs, (extra >> 12) & 7) = offset;
}
}
}
}
m68k_incpc(6);
return 6;
}
unsigned long op_edf9_0(UINT32 opcode) /* BFFFO */
{
{
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = get_ilong(4);
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	{ UINT32 mask = 1 << (width-1);
	while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}
	m68k_dreg(regs, (extra >> 12) & 7) = offset;
}
}
}
}
m68k_incpc(8);
return 8;
}
unsigned long op_edfa_0(UINT32 opcode) /* BFFFO */
{
{
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = m68k_getpc () + 4;
	dsta += (INT32)(INT16)get_iword(4);
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	{ UINT32 mask = 1 << (width-1);
	while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}
	m68k_dreg(regs, (extra >> 12) & 7) = offset;
}
}
}
}
m68k_incpc(6);
return 6;
}
unsigned long op_edfb_0(UINT32 opcode) /* BFFFO */
{
{
{
	INT16 extra = get_iword(2);
{
m68k_incpc(4);
{
	unsigned int tmppc = m68k_getpc();
	unsigned int dsta = get_disp_ea_020(tmppc, next_iword());
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	{ UINT32 mask = 1 << (width-1);
	while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}
	m68k_dreg(regs, (extra >> 12) & 7) = offset;
}
}
}
}
}
return 7;
}
unsigned long op_eec0_0(UINT32 opcode) /* BFSET */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 extra = get_iword(2);
{
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f);
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	tmp = 0xffffffff;
	tmp <<= (32 - width);
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 :
		(0xffffffff << (32 - (offset & 0x1f))))) |
		(tmp >> (offset & 0x1f)) |
		(((offset & 0x1f) + width) >= 32 ? 0 :
 (m68k_dreg(regs, dstreg) & ((UINT32)0xffffffff >> ((offset & 0x1f) + width))));
}
}
}
}
m68k_incpc(4);
return 4;
}
unsigned long op_eed0_0(UINT32 opcode) /* BFSET */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg);
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	tmp = 0xffffffff;
	tmp <<= (32 - width);
	bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |
		(tmp >> (offset & 7)) |
		(((offset & 7) + width) >= 32 ? 0 :
		 (bf0 & ((UINT32)0xffffffff >> ((offset & 7) + width))));
	cpu_writemem24_dword(dsta,bf0 );
	if (((offset & 7) + width) > 32) {
		bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |
			(tmp << (8 - (offset & 7)));
		cpu_writemem24(dsta+4,bf1);
	}
}
}
}
}
m68k_incpc(4);
return 4;
}
unsigned long op_eee8_0(UINT32 opcode) /* BFSET */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg) + (INT32)(INT16)get_iword(4);
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	tmp = 0xffffffff;
	tmp <<= (32 - width);
	bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |
		(tmp >> (offset & 7)) |
		(((offset & 7) + width) >= 32 ? 0 :
		 (bf0 & ((UINT32)0xffffffff >> ((offset & 7) + width))));
	cpu_writemem24_dword(dsta,bf0 );
	if (((offset & 7) + width) > 32) {
		bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |
			(tmp << (8 - (offset & 7)));
		cpu_writemem24(dsta+4,bf1);
	}
}
}
}
}
m68k_incpc(6);
return 6;
}
unsigned long op_eef0_0(UINT32 opcode) /* BFSET */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 extra = get_iword(2);
{
m68k_incpc(4);
{
	unsigned int dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword());
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	tmp = 0xffffffff;
	tmp <<= (32 - width);
	bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |
		(tmp >> (offset & 7)) |
		(((offset & 7) + width) >= 32 ? 0 :
		 (bf0 & ((UINT32)0xffffffff >> ((offset & 7) + width))));
	cpu_writemem24_dword(dsta,bf0 );
	if (((offset & 7) + width) > 32) {
		bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |
			(tmp << (8 - (offset & 7)));
		cpu_writemem24(dsta+4,bf1);
	}
}
}
}
}
}
return 7;
}
unsigned long op_eef8_0(UINT32 opcode) /* BFSET */
{
{
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = (INT32)(INT16)get_iword(4);
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	tmp = 0xffffffff;
	tmp <<= (32 - width);
	bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |
		(tmp >> (offset & 7)) |
		(((offset & 7) + width) >= 32 ? 0 :
		 (bf0 & ((UINT32)0xffffffff >> ((offset & 7) + width))));
	cpu_writemem24_dword(dsta,bf0 );
	if (((offset & 7) + width) > 32) {
		bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |
			(tmp << (8 - (offset & 7)));
		cpu_writemem24(dsta+4,bf1);
	}
}
}
}
}
m68k_incpc(6);
return 6;
}
unsigned long op_eef9_0(UINT32 opcode) /* BFSET */
{
{
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = get_ilong(4);
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	tmp = 0xffffffff;
	tmp <<= (32 - width);
	bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |
		(tmp >> (offset & 7)) |
		(((offset & 7) + width) >= 32 ? 0 :
		 (bf0 & ((UINT32)0xffffffff >> ((offset & 7) + width))));
	cpu_writemem24_dword(dsta,bf0 );
	if (((offset & 7) + width) > 32) {
		bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |
			(tmp << (8 - (offset & 7)));
		cpu_writemem24(dsta+4,bf1);
	}
}
}
}
}
m68k_incpc(8);
return 8;
}
unsigned long op_efc0_0(UINT32 opcode) /* BFINS */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 extra = get_iword(2);
{
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f);
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	tmp = m68k_dreg(regs, (extra >> 12) & 7);
	tmp <<= (32 - width);
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 :
		(0xffffffff << (32 - (offset & 0x1f))))) |
		(tmp >> (offset & 0x1f)) |
		(((offset & 0x1f) + width) >= 32 ? 0 :
 (m68k_dreg(regs, dstreg) & ((UINT32)0xffffffff >> ((offset & 0x1f) + width))));
}
}
}
}
m68k_incpc(4);
return 4;
}
unsigned long op_efd0_0(UINT32 opcode) /* BFINS */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg);
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	tmp = m68k_dreg(regs, (extra >> 12) & 7);
	tmp <<= (32 - width);
	bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |
		(tmp >> (offset & 7)) |
		(((offset & 7) + width) >= 32 ? 0 :
		 (bf0 & ((UINT32)0xffffffff >> ((offset & 7) + width))));
	cpu_writemem24_dword(dsta,bf0 );
	if (((offset & 7) + width) > 32) {
		bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |
			(tmp << (8 - (offset & 7)));
		cpu_writemem24(dsta+4,bf1);
	}
}
}
}
}
m68k_incpc(4);
return 4;
}
unsigned long op_efe8_0(UINT32 opcode) /* BFINS */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 extra = get_iword(2);
{
	unsigned int dsta = m68k_areg(regs, dstreg) + (INT32)(INT16)get_iword(4);
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	tmp = m68k_dreg(regs, (extra >> 12) & 7);
	tmp <<= (32 - width);
	bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |
		(tmp >> (offset & 7)) |
		(((offset & 7) + width) >= 32 ? 0 :
		 (bf0 & ((UINT32)0xffffffff >> ((offset & 7) + width))));
	cpu_writemem24_dword(dsta,bf0 );
	if (((offset & 7) + width) > 32) {
		bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |
			(tmp << (8 - (offset & 7)));
		cpu_writemem24(dsta+4,bf1);
	}
}
}
}
}
m68k_incpc(6);
return 6;
}
unsigned long op_eff0_0(UINT32 opcode) /* BFINS */
{
	UINT32 dstreg = opcode & 7;
{
{
	INT16 extra = get_iword(2);
{
m68k_incpc(4);
{
	unsigned int dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword());
{
	INT32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
	int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;
	UINT32 tmp,bf0,bf1;
	dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);
	bf0 = cpu_readmem24_dword(dsta);bf1 = cpu_readmem24(dsta+4) & 0xff;
	tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));
	tmp >>= (32 - width);
	SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);
	SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);
	tmp = m68k_dreg(regs, (extra >> 12) & 7);
	tmp <<= (32 - width);
	bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |
		(tmp >> (offset & 7)) |
		(((off