📄 yibudianji_fangzhen_moxing_yunxing.mdl
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Model {
Name "yibudianji_fangzhen_moxing_yunxing"
Version 5.0
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LibraryLinkDisplay "none"
WideLines off
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CovPath "/"
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Created "Mon Nov 17 23:14:20 2003"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
LastModifiedBy "pxs"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Tue Nov 18 00:10:55 2003"
ModelVersionFormat "1.%<AutoIncrement:15>"
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RTWExpressionDepthLimit 5
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MaxNumMinSteps "-1"
InitialStep "auto"
FixedStep "auto"
RelTol "1e-3"
AbsTol "auto"
OutputOption "RefineOutputTimes"
OutputTimes "[]"
Refine "1"
LoadExternalInput off
ExternalInput "[t, u]"
LoadInitialState off
InitialState "xInitial"
SaveTime on
TimeSaveName "tout"
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SignalLoggingName "sigsOut"
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AlgebraicLoopMsg "warning"
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BusSelectionMode off
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Block {
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Expr "sin(u[1])"
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Block {
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Block {
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Phase "0"
Samples "10"
Offset "0"
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OutDataType "sfix(16)"
OutScaling "2^0"
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RndMeth "Floor"
SaturateOnIntegerOverflow on
}
Block {
BlockType Trigonometry
Operator "sin"
OutputSignalType "auto"
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FontAngle "normal"
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LineDefaults {
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FontSize 9
FontWeight "normal"
FontAngle "normal"
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System {
Name "yibudianji_fangzhen_moxing_yunxing"
Location [2, 70, 1022, 720]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
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Block {
BlockType Integrator
Name "Integrator"
Ports [1, 1]
Position [830, 200, 860, 230]
}
Block {
BlockType Mux
Name "Mux"
Ports [3, 1]
Position [160, 120, 165, 250]
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Inputs "3"
DisplayOption "bar"
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Block {
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Name "ROTOR_system"
Ports [7, 2]
Position [290, 370, 360, 550]
TreatAsAtomicUnit off
System {
Name "ROTOR_system"
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Open off
ModelBrowserVisibility off
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Name "uqr"
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Port "3"
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Block {
BlockType Inport
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Port "4"
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BlockType Inport
Name "ws"
Position [410, 268, 440, 282]
Port "5"
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Block {
BlockType Inport
Name "wr"
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Port "6"
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Block {
BlockType Inport
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Port "7"
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Block {
BlockType Gain
Name "1/n1=1/1500"
Position [305, 170, 335, 200]
Gain "1/1500"
}
Block {
BlockType Integrator
Name "Integrator"
Ports [1, 1]
Position [775, 405, 805, 435]
}
Block {
BlockType Integrator
Name "Integrator1"
Ports [1, 1]
Position [780, 115, 810, 145]
}
Block {
BlockType Product
Name "Product"
Ports [2, 1]
Position [610, 191, 655, 224]
InputSameDT off
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InputSameDT off
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Block {
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Position [235, 166, 280, 199]
InputSameDT off
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Block {
BlockType Product
Name "Product3"
Ports [2, 1]
Position [605, 136, 650, 169]
InputSameDT off
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Block {
BlockType Product
Name "Product4"
Ports [2, 1]
Position [620, 461, 665, 494]
InputSameDT off
}
Block {
BlockType Constant
Name "R0,s=0,n=1"
Position [60, 139, 105, 171]
Value "0.042"
}
Block {
BlockType Constant
Name "R1,s=1,n=0"
Position [55, 79, 105, 111]
Value "0.0715"
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Block {
BlockType Sum
Name "Sum"
Ports [3, 1]
Position [690, 342, 735, 498]
ShowName off
Inputs "-+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
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Block {
BlockType Sum
Name "Sum1"
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Position [695, 52, 740, 208]
ShowName off
Inputs "|+-+"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
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Block {
BlockType Sum
Name "Sum2"
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Position [515, 197, 560, 353]
ShowName off
Inputs "|+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
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Block {
BlockType Sum
Name "Sum3"
Ports [2, 1]
Position [160, 71, 185, 149]
ShowName off
Inputs "|+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
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Block {
BlockType Sum
Name "Sum4"
Ports [2, 1]
Position [360, 121, 385, 199]
ShowName off
Inputs "|+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
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Block {
BlockType Gain
Name "p"
Position [465, 310, 495, 340]
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Block {
BlockType Outport
Name "psiqr"
Position [855, 413, 885, 427]
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Block {
BlockType Outport
Name "psidr"
Position [855, 123, 885, 137]
Port "2"
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Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "Integrator"
DstPort 1
}
Line {
SrcBlock "Integrator"
SrcPort 1
Points [0, 0; 10, 0]
Branch {
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