📄 c8051f340.lst
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151 sfr PCA0CPH0 = 0xFC; // PCA0 Capture 0 High
152 sfr PCA0CPL4 = 0xFD; // PCA0 Capture 4 Low
153 sfr PCA0CPH4 = 0xFE; // PCA0 Capture 4 High
154 sfr VDM0CN = 0xFF; // VDD Monitor Control
155
156
157 //-----------------------------------------------------------------------------
158 // Bit Definitions
159 //-----------------------------------------------------------------------------
160
161 // TCON 0x88
162 sbit TF1 = 0x8F; // Timer1 overflow flag
163 sbit TR1 = 0x8E; // Timer1 on/off control
164 sbit TF0 = 0x8D; // Timer0 overflow flag
165 sbit TR0 = 0x8C; // Timer0 on/off control
166 sbit IE1 = 0x8B; // Ext interrupt 1 edge flag
167 sbit IT1 = 0x8A; // Ext interrupt 1 type
168 sbit IE0 = 0x89; // Ext interrupt 0 edge flag
169 sbit IT0 = 0x88; // Ext interrupt 0 type
170
171 // SCON0 0x98
172 sbit S0MODE = 0x9F; // Serial mode control bit 0
173 // Bit6 UNUSED
174 sbit MCE0 = 0x9D; // Multiprocessor communication enable
175 sbit REN0 = 0x9C; // Receive enable
176 sbit TB80 = 0x9B; // Transmit bit 8
177 sbit RB80 = 0x9A; // Receive bit 8
178 sbit TI0 = 0x99; // Transmit interrupt flag
179 sbit RI0 = 0x98; // Receive interrupt flag
C51 COMPILER V8.08 C8051F340 04/08/2009 10:00:34 PAGE 4
180
181 // IE 0xA8
182 sbit EA = 0xAF; // Global interrupt enable
183 sbit ESPI0 = 0xAE; // SPI0 interrupt enable
184 sbit ET2 = 0xAD; // Timer2 interrupt enable
185 sbit ES0 = 0xAC; // UART0 interrupt enable
186 sbit ET1 = 0xAB; // Timer1 interrupt enable
187 sbit EX1 = 0xAA; // External interrupt 1 enable
188 sbit ET0 = 0xA9; // Timer0 interrupt enable
189 sbit EX0 = 0xA8; // External interrupt 0 enable
190
191 // IP 0xB8
192 // Bit7 UNUSED
193 sbit PSPI0 = 0xBE; // SPI0 interrupt priority
194 sbit PT2 = 0xBD; // Timer2 priority
195 sbit PS0 = 0xBC; // UART0 priority
196 sbit PT1 = 0xBB; // Timer1 priority
197 sbit PX1 = 0xBA; // External interrupt 1 priority
198 sbit PT0 = 0xB9; // Timer0 priority
199 sbit PX0 = 0xB8; // External interrupt 0 priority
200
201 // SMB0CN 0xC0
202 sbit MASTER = 0xC7; // Master/slave indicator
203 sbit TXMODE = 0xC6; // Transmit mode indicator
204 sbit STA = 0xC5; // Start flag
205 sbit STO = 0xC4; // Stop flag
206 sbit ACKRQ = 0xC3; // Acknowledge request
207 sbit ARBLOST = 0xC2; // Arbitration lost indicator
208 sbit ACK = 0xC1; // Acknowledge flag
209 sbit SI = 0xC0; // SMBus interrupt flag
210
211 // TMR2CN 0xC8
212 sbit TF2H = 0xCF; // Timer2 high byte overflow flag
213 sbit TF2L = 0xCE; // Timer2 low byte overflow flag
214 sbit TF2LEN = 0xCD; // Timer2 low byte interrupt enable
215 sbit T2CE = 0xCC; // Timer2 capture enable
216 sbit T2SPLIT = 0xCB; // Timer2 split mode enable
217 sbit TR2 = 0xCA; // Timer2 on/off control
218 sbit T2CSS = 0xC9; // Timer 2 Capture Source select
219 sbit T2XCLK = 0xC8; // Timer2 external clock select
220
221 // PSW 0xD0
222 sbit CY = 0xD7; // Carry flag
223 sbit AC = 0xD6; // Auxiliary carry flag
224 sbit F0 = 0xD5; // User flag 0
225 sbit RS1 = 0xD4; // Register bank select 1
226 sbit RS0 = 0xD3; // Register bank select 0
227 sbit OV = 0xD2; // Overflow flag
228 sbit F1 = 0xD1; // User flag 1
229 sbit P = 0xD0; // Accumulator parity flag
230
231 // PCA0CN 0xD8
232 sbit CF = 0xDF; // PCA0 counter overflow flag
233 sbit CR = 0xDE; // PCA0 counter run control
234 // Bit5 UNUSED
235 sbit CCF4 = 0xDC; // PCA0 module4 capture/compare flag
236 sbit CCF3 = 0xDB; // PCA0 module3 capture/compare flag
237 sbit CCF2 = 0xDA; // PCA0 module2 capture/compare flag
238 sbit CCF1 = 0xD9; // PCA0 module1 capture/compare flag
239 sbit CCF0 = 0xD8; // PCA0 module0 capture/compare flag
240
241 // ADC0CN 0xE8
C51 COMPILER V8.08 C8051F340 04/08/2009 10:00:34 PAGE 5
242 sbit AD0EN = 0xEF; // ADC0 enable
243 sbit AD0TM = 0xEE; // ADC0 track mode
244 sbit AD0INT = 0xED; // ADC0 conversion complete interrupt flag
245 sbit AD0BUSY = 0xEC; // ADC0 busy flag
246 sbit AD0WINT = 0xEB; // ADC0 window compare interrupt flag
247 sbit AD0CM2 = 0xEA; // ADC0 conversion mode select 2
248 sbit AD0CM1 = 0xE9; // ADC0 conversion mode select 1
249 sbit AD0CM0 = 0xE8; // ADC0 conversion mode select 0
250
251 // SPI0CN 0xF8
252 sbit SPIF = 0xFF; // SPI0 interrupt flag
253 sbit WCOL = 0xFE; // SPI0 write collision flag
254 sbit MODF = 0xFD; // SPI0 mode fault flag
255 sbit RXOVRN = 0xFC; // SPI0 rx overrun flag
256 sbit NSSMD1 = 0xFB; // SPI0 slave select mode 1
257 sbit NSSMD0 = 0xFA; // SPI0 slave select mode 0
258 sbit TXBMT = 0xF9; // SPI0 transmit buffer empty
259 sbit SPIEN = 0xF8; // SPI0 SPI enable
260
261
262 //-----------------------------------------------------------------------------
263 // Interrupt Priorities
264 //-----------------------------------------------------------------------------
265
266 #define INTERRUPT_INT0 0 // External Interrupt 0
267 #define INTERRUPT_TIMER0 1 // Timer0 Overflow
268 #define INTERRUPT_INT1 2 // External Interrupt 1
269 #define INTERRUPT_TIMER1 3 // Timer1 Overflow
270 #define INTERRUPT_UART0 4 // Serial Port 0
271 #define INTERRUPT_TIMER2 5 // Timer2 Overflow
272 #define INTERRUPT_SPI0 6 // Serial Peripheral Interface 0
273 #define INTERRUPT_SMBUS0 7 // SMBus0 Interface
274 #define INTERRUPT_USB0 8 // USB Interface
275 #define INTERRUPT_ADC0_WINDOW 9 // ADC0 Window Comparison
276 #define INTERRUPT_ADC0_EOC 10 // ADC0 End Of Conversion
277 #define INTERRUPT_PCA0 11 // PCA0 Peripheral
278 #define INTERRUPT_COMPARATOR0 12 // Comparator0
279 #define INTERRUPT_COMPARATOR1 13 // Comparator1
280 #define INTERRUPT_TIMER3 14 // Timer3 Overflow
281 #define INTERRUPT_VBUS_LEVEL 15 // VBUS level-triggered interrupt
282 #define INTERRUPT_UART1 16 // Serial Port 1
283
284 //-----------------------------------------------------------------------------
285 // Header File PreProcessor Directive
286 //-----------------------------------------------------------------------------
287
288 #endif // #define C8051F340_H
289
290 //-----------------------------------------------------------------------------
291 // End Of File
292 //-----------------------------------------------------------------------------
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = ---- ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILER V8.08 C8051F340 04/08/2009 10:00:34 PAGE 6
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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