sleep0.asm

串口通信 频率测量 EEPROM读写程序

                           
          .include "c:\appnotes\2313def.inc"
          .org $000
           rjmp main
           .org $006
            rjmp timer0            
           .org $00a
            rjmp  UART_DRE
            .org $00b
            rjmp UART_TXC           
          .org $00d
     MAIN: ldi r17,$df  ;setup STACK pointer in internal SRAM so that
           out SPL,r17  ;RCALL and interrupt subroutine can use it for
                        ; return                                  
           ldi r25,$80
           out SREG,r25 ;enable globle interrupt          
          ; ldi r17,0b00001010 
          ;out WDTCR,r17;enable watchdog
          ; wdr          ;reset wachdog 
           ldi r20,207
           out UBRR,r20 ;set baud rate 
           sbi DDRD,0  ; set PD0 output mode
           cbi PORTD,0 ; Disnable 74ls164   
           sbi UCR,0                            
           ldi r22,0b00110111
           out DDRB,r22
           sbi PORTB,0 
           sbi PORTD,0                            
           ldi r21,$73           
           sbi UCR,5 
           out UDR , r21                              
           rjmp main                  
    timer0: reti  
  UART_TXC: reti
  UART_DRE:sbi PORTD,0  ;enable 74ls164 
           sbi UCR,3
;   trans: sbis USR,6           
;          rjmp trans ;translation over?           
           cbi UCR,5
           reti
           .org $0100           
  seg_code:.db $3f,$06,$5b,$4f,$66,$6d,$7d,$07
           .db $7f,$6f,$77,$7c,$39,$5e,$79,$71                     
  display: rcall flash_ram 
           ldi YL,$60           
           ldi YH,$00                   
           add YL,r20
           ld  r20,Y           
  led_disp:;out SPDR , r20 
           ldi r17,$01
           out PORTB,r17 ;PB.0 output 1 ,the rightest LED 
                         ;display key number                
flash_ram: ldi YL,$60           
           ldi YH,$00              ;RAM begin address
           ldi ZL ,low(seg_code*2) ; load Z register low byte
           ldi ZH ,high(seg_code*2); load Z register high byte
           ldi r18,$10             ;flash data block size
load_flash:lpm
           st Y+,r0
           adiw ZL,1
           dec r18
           brne load_flash
           ret