blink50.asm

串口通信 频率测量 EEPROM读写程序

          .include "c:\appnotes\2333def.inc"
          .org $000
           rjmp main         
           .org $007
           rjmp SPI_TXC               
          .org $00d
     MAIN:;********************************************************
          ; 
          ; initialize MCU system
          ;
           ser r16
           out DDRC,r16 ;portc is output mode and turn off all LEDS
           ldi r17,$df
           out SPL,r17         
           ldi r25,$80
           out SREG,r25 ;enable globle interrupt                      
           ldi r25,0b00001100
           out MCUCR,r25; set INT! low level trigger        
           ldi r20,$00
           out ADCSR,r20    ;Disnable ADC     
           ldi r17,$08
           out WDTCR,r17;enable wacthdog
           wdr          ;reset wachdog                                     
           sbi DDRB,3    ;set MOSI(PB.5) output mode whwn SPI is master.
           sbi DDRB,5    ;set SCK (PB.7) output mode when SPI is master
           sbi DDRB,2    ;set SS output mode so that this byte cann't
                         ;influence SPI master work mode .
           ldi r17,0b11111100
           out SPCR,r17  ;set SPIE,SPE,MSTR,CPOL,CPHA ,reset the others
           ldi r25,$80  
           out GIMSK,r25 ;enable INT!   
         ; 
         ;**********************************************************
         ;
         ;LED display "50"
         ;set T=0 k3 first press down . T=1 k3 press down twice.      
  
           brtc disp_50
           rjmp disp_120 
 disp_50:  ldi r21,$6d
            out SPDR , r21 
            ldi r17,0b0000001
            out PORTC,r17 ;PC.0 display "5"
    ; wait0:sbis SPSR,7
    ;       rjmp wait0                                              
            rcall delay
            ldi r17,0b0000000
            out PORTC,r17                                                              
            ldi r21,$3f        
            out SPDR,r21  
            ldi r17,0b0000010  
            out PORTC,r17 ;PC.1 dispaly "0       
    ; wait1: sbis SPSR,7
    ;       rjmp wait1                                    
            rcall delay
            ldi r17,0b0000000
            out PORTC,r17             
            set
            ret
  disp_120:  ldi r21,$06
           out SPDR , r21 
           ldi r17,0b0000100
           out PORTC,r17 ;PC.2 display "1"
    ; wait0:sbis SPSR,7
    ;       rjmp wait0             
           rcall delay
           ldi r17,0b0000000 
           out PORTC,r17 
           ldi r21,$5b
           out SPDR , r21 
           ldi r17,0b0001000
           out PORTC,r17 
           out PORTC,r17 ;PC.3 display "2"
    ; wait0:sbis SPSR,7
    ;       rjmp wait0             
           rcall delay
           ldi r17,0b0000000 
           out PORTC,r17 
          ldi r21,$3f
           out SPDR , r21 
           ldi r17,0b0010000
           out PORTC,r17 ;PC.4 display "0"
    ; wait0:sbis SPSR,7
    ;       rjmp wait0             
           rcall delay
           ldi r17,0b0000000 
           out PORTC,r17  
           clt
           ret                      
  SPI_TXC:sbi SPCR,4
           reti
     delay:ldi r21,$01
        d2:ldi r22,$01                    
        d1:ldi r23,$ff
        d0:dec r23
           wdr           
           brne d0            
           dec r22                      
           brne d1
           dec r21         
           brne d2
           ret
     delay1:ldi r21,$01
        d21:ldi r22,$ff                    
        d11:ldi r23,$ff
        d01:dec r23
           wdr           
           brne d01            
           dec r22                      
           brne d11
           dec r21         
           brne d21
           ret