📄 usbfs_1_std.lis
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0000 macro M8C_DisableIntMask
0000 and reg[@0], ~@1 ; disable specified interrupt enable bit
0000 macro M8C_EnableIntMask
0000 or reg[@0], @1 ; enable specified interrupt enable bit
0000 macro M8C_ClearIntFlag
0000 mov reg[@0], ~@1 ; clear specified interrupt enable bit
0000 macro M8C_EnableWatchDog
0000 and reg[CPU_SCR0], ~CPU_SCR0_PORS_MASK
0000 macro M8C_ClearWDT
0000 mov reg[RES_WDT], 00h
0000 macro M8C_ClearWDTAndSleep
0000 mov reg[RES_WDT], 38h
0000 macro M8C_Stall
0000 or reg[ASY_CR], ASY_CR_SYNCEN
0000 macro M8C_Unstall
0000 and reg[ASY_CR], ~ASY_CR_SYNCEN
0000 macro M8C_Sleep
0000 or reg[CPU_SCR0], CPU_SCR0_SLEEP_MASK
0000 ; The next instruction to be executed depends on the state of the
0000 ; various interrupt enable bits. If some interrupts are enabled
0000 ; and the global interrupts are disabled, the next instruction will
0000 ; be the one that follows the invocation of this macro. If global
0000 ; interrupts are also enabled then the next instruction will be
0000 ; from the interrupt vector table. If no interrupts are enabled
0000 ; then the CPU sleeps forever.
0000 macro M8C_Stop
0000 ; In general, you probably don't want to do this, but here's how:
0000 or reg[CPU_SCR0], CPU_SCR0_STOP_MASK
0000 ; Next instruction to be executed is located in the interrupt
0000 ; vector table entry for Power-On Reset.
0000 macro M8C_Reset
0000 ; Restore CPU to the power-on reset state.
0000 mov A, 0
0000 SSC
0000 ; Next non-supervisor instruction will be at interrupt vector 0.
0000 macro Suspend_CodeCompressor
0000 or F, 0
0000 macro Resume_CodeCompressor
0000 add SP, 0
0000 MACRO GET_REG
0000 IF TEST_BENCH
0000 mov a,[@0] ; Get the simulated reg
0000 ELSE
0000 mov a,reg[@0] ; Get the real reg
0000 ENDIF
0000 MACRO PUT_REG
0000 IF TEST_BENCH
0000 mov [@0],a ; Set the simulated reg
0000 ELSE
0000 mov reg[@0],a ; Set the real reg
0000 ENDIF
0000 MACRO PUT_REG_CONST
0000 IF TEST_BENCH
0000 mov [@0],@1 ; Set the simulated reg
0000 ELSE
0000 mov reg[@0],@1 ; Set the real reg
0000 ENDIF
0000 MACRO GET_WORD
0000 RAM_X_POINTS_TO_STACKPAGE ; Since called by interrupt we can call this
0000 PUSH A ; Quickly get a RAM temp
0000 PUSH A ; Save the source MSB
0000 ROMX ; Get the first byte
0000 PUSH X ; Save X
0000 MOV X,SP ; Get SP, to index to the temp
0000 MOV [X - 3],A ; Save the first byte
0000 POP X ; Get back the source LSB
0000 POP A ; And the MSB
0000 INC X ; Point to the second byte
0000 ADC A, 0 ;
0000 ROMX ; Get the second byte
0000 MOV X,A ; Save it in X
0000 POP A ; And the first byte in A
0000 RAM_CHANGE_PAGE_MODE 00 ; Reset stack mode back
0000 MACRO NULL_PTR_CHECK
0000 SWAP A, X ; LSB non-zero?
0000 JNZ .ok ; Exit on non-zero
0000 SWAP A, X ; MSB zero
0000 JZ @0 ; Jump to the null pointer handler
0000 JMP .exit
0000 .ok:
0000 SWAP A, X ; Put them back
0000 .exit:
0000 NULL_PTR: EQU 0 ; Null pointer value
0000
0000 ;--------------------------------------------------
0000 ; Transfer Descriptor--Data Source
0000 ;--------------------------------------------------
0000 USB_DS_ROM: EQU 0x00
0001 USB_DS_RAM: EQU 0x01
0002 USB_DS_RAM_CB: EQU 0x02
0003 USB_DS_RAM_MASK: EQU 0x03
0000
0000 ;--------------------------------------------------
0000 ; TRANSFER DESCRIPTOR MACROS
0000 ;--------------------------------------------------
0000
0000 ;-----------------------------------------------
0000 ; TD_START_TABLE MACRO
0000 ;-----------------------------------------------
0000 ; Parameters:
0000 ; @0 = Number of table entries
0000 ; Register setup
0000 ; N/A (builds ROM data at assembly time)
0000 ;-----------------------------------------------
0000 MACRO TD_START_TABLE
0000 DB ((@0) - 1) ; Number of table entries - 1
0000 MACRO TD_ENTRY
0000 DB @0 ; Data source (USB_DS_*)
0000 DW @1 ; Transfer size
0000 DW @2 ; Data source address
0000 DW @3 ; Transfer Completion Status Block Address
0000 DB 0xde ; Reserved
0008 TD_ENTRY_SIZE: EQU 8
0001 TD_START_SIZE: EQU 1
0000 ;-----------------------------------------------
0000 ; TD_INDEX_TO_OFFSET MACRO
0000 ;-----------------------------------------------
0000 ; Parameters:
0000 ; @0 = RAM address of Index
0000 ; Register setup
0000 ; A = DC (restored)
0000 ; X = DC (not used)
0000 ;--------------------------------------------------
0000 MACRO TD_INDEX_TO_OFFSET
0000 PUSH A ; Save a work register
0000 ASL [@0] ; Index * 2
0000 ASL [@0] ; Index * 4
0000 ASL [@0] ; Index * 8
0000 POP A ; Restore the work register
0000 MACRO LT_START
0000 DB (@0) ; Table size
0000 MACRO LT_ENTRY
0000 DW (@0) ; Table entry
0000 DW (@1) ; Table entry
0002 LT_ENTRY_SIZE: EQU 2
0001 LT_START_SIZE: EQU 1
0000
0000 ;-----------------------------------------------
0000 ; LT_INDEX_TO_OFFSET MACRO
0000 ;-----------------------------------------------
0000 ; Parameters:
0000 ; @0 = RAM address of Index
0000 ; Register setup
0000 ; A = DC (not used)
0000 ; X = DC (not used)
0000 ;--------------------------------------------------
0000 MACRO LT_INDEX_TO_OFFSET
0000 ASL [@0] ; Simply shift (mult by 2)
0000 ASL [@0] ; (mult by 4)
0000 MACRO DISPATCHER
0000 CMP A,@1
0000 JNC .dispatch_not_supported
0000 ASL A
0000 JACC @0
0000 .dispatch_not_supported:
0000 JMP @2
0001 USB_NOT_SUPPORTED: EQU 0x01
0002 USB_UM_SUPPLIED: EQU 0x02
0004 USB_APP_SUPPLIED: EQU 0x04
0000 ; end of file USBFS_1_macro.inc
00DF USBFS_1_INT_REG: equ 0xDF
0001 USBFS_1_INT_RESET_MASK: equ 0x01
0002 USBFS_1_INT_SOF_MASK: equ 0x02
0004 USBFS_1_INT_EP0_MASK: equ 0x04
0008 USBFS_1_INT_EP1_MASK: equ 0x08
0010 USBFS_1_INT_EP2_MASK: equ 0x10
0020 USBFS_1_INT_EP3_MASK: equ 0x20
0040 USBFS_1_INT_EP4_MASK: equ 0x40
0080 USBFS_1_INT_WAKEUP_MASK: equ 0x80
0000
0000 ;--------------------------------------------------
0000 ; Constants for USBFS_1 API's.
0000 ;--------------------------------------------------
0000 USBFS_1_bNumStringDescrs: EQU 0x0
0000
0005 USB_NUM_ENDPOINTS: EQU 5
0004 USB_MAX_EP_NUMBER: EQU (USB_NUM_ENDPOINTS - 1)
0000
0002 USB_3V_OPERATION: EQU 0x02
0003 USB_5V_OPERATION: EQU 0x03
0000
0000 ;--------------------------------------------------
0000 ; Registers for USBFS_1 API's.
0000 ;-----
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