7seg.tdf

来自「veriloghdl 交通灯veriloghdl 交通灯veriloghdl 交」· TDF 代码 · 共 22 行

SUBDESIGN 7seg
(
	i[3..0]				: INPUT;
	a,b,c,d,e,f,g,dp	: OUTPUT;
	
)
begin
table
i[3..0]	=> a,b,c,d,e,f,g,dp;
h"0"	=> 0,0,0,0,0,0,1,1;
h"1"	=> 1,0,0,1,1,1,1,1;
h"2"	=> 0,0,1,0,0,1,0,1;
h"3"	=> 0,0,0,0,1,1,0,1;
h"4"	=> 1,0,0,1,1,0,0,1;
h"5"	=> 0,1,0,0,1,0,0,1;
h"6"	=> 0,1,0,0,0,0,0,1;
h"7"	=> 0,0,0,1,1,1,1,1;
h"8"	=> 0,0,0,0,0,0,0,1;
h"9"	=> 0,0,0,0,1,0,0,1;
end table;
end;