select.rpt

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RPT
798
字号
select

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'B':

                         Logic cells placed in LAB 'B'
        +--------------- LC22 DATAOUT013
        | +------------- LC17 DATAOUT014
        | | +----------- LC28 DATAOUT015
        | | | +--------- LC27 DATAOUT016
        | | | | +------- LC21 DATAOUT113
        | | | | | +----- LC20 DATAOUT114
        | | | | | | +--- LC19 DATAOUT115
        | | | | | | | +- LC32 DATAOUT116
        | | | | | | | | 
        | | | | | | | |   Other LABs fed by signals
        | | | | | | | |   that feed LAB 'B'
LC      | | | | | | | | | A B C D |     Logic cells that feed LAB 'B':

Pin
67   -> - - - - - - - - | - - * - | <-- DATA9
68   -> - - - - - - - - | - - * - | <-- DATA10
25   -> * - - - * - - - | - * - - | <-- DATA13
27   -> - * - - - * - - | - * - - | <-- DATA14
2    -> - - * - - - * - | - * - - | <-- DATA15
1    -> - - - * - - - * | - * - - | <-- DATA16
14   -> * * * * * * * * | - * * * | <-- maincol0
15   -> * * * * * * * * | - * * * | <-- maincol1
17   -> * * * * * * * * | - * * * | <-- subcol0
18   -> * * * * * * * * | - * * * | <-- subcol1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                             e:\traffic\select.rpt
select

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'C':

                                 Logic cells placed in LAB 'C'
        +----------------------- LC46 DATAOUT07
        | +--------------------- LC38 DATAOUT08
        | | +------------------- LC40 DATAOUT09
        | | | +----------------- LC41 DATAOUT010
        | | | | +--------------- LC45 DATAOUT011
        | | | | | +------------- LC48 DATAOUT012
        | | | | | | +----------- LC35 DATAOUT17
        | | | | | | | +--------- LC33 DATAOUT18
        | | | | | | | | +------- LC36 DATAOUT19
        | | | | | | | | | +----- LC37 DATAOUT110
        | | | | | | | | | | +--- LC44 DATAOUT111
        | | | | | | | | | | | +- LC43 DATAOUT112
        | | | | | | | | | | | | 
        | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | |   that feed LAB 'C'
LC      | | | | | | | | | | | | | A B C D |     Logic cells that feed LAB 'C':

Pin
12   -> * - - - - - * - - - - - | - - * - | <-- DATA7
4    -> - * - - - - - * - - - - | - - * - | <-- DATA8
67   -> - - * - - - - - * - - - | - - * - | <-- DATA9
68   -> - - - * - - - - - * - - | - - * - | <-- DATA10
20   -> - - - - * - - - - - * - | - - * - | <-- DATA11
22   -> - - - - - * - - - - - * | - - * - | <-- DATA12
2    -> - - - - - - - - - - - - | - * - - | <-- DATA15
1    -> - - - - - - - - - - - - | - * - - | <-- DATA16
14   -> * * * * * * * * * * * * | - * * * | <-- maincol0
15   -> * * * * * * * * * * * * | - * * * | <-- maincol1
17   -> * * * * * * * * * * * * | - * * * | <-- subcol0
18   -> * * * * * * * * * * * * | - * * * | <-- subcol1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                             e:\traffic\select.rpt
select

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'D':

                                   Logic cells placed in LAB 'D'
        +------------------------- LC52 DATAOUT01
        | +----------------------- LC57 DATAOUT02
        | | +--------------------- LC59 DATAOUT03
        | | | +------------------- LC64 DATAOUT04
        | | | | +----------------- LC62 DATAOUT05
        | | | | | +--------------- LC54 DATAOUT06
        | | | | | | +------------- LC60 DATAOUT11
        | | | | | | | +----------- LC56 DATAOUT12
        | | | | | | | | +--------- LC61 DATAOUT13
        | | | | | | | | | +------- LC51 DATAOUT14
        | | | | | | | | | | +----- LC53 DATAOUT15
        | | | | | | | | | | | +--- LC49 DATAOUT16
        | | | | | | | | | | | | +- LC50 ~327~1
        | | | | | | | | | | | | | 
        | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | |   that feed LAB 'D'
LC      | | | | | | | | | | | | | | A B C D |     Logic cells that feed LAB 'D':
LC50 -> - - - * * * - - - - - - - | - - - * | <-- ~327~1

Pin
5    -> * - - - - - * - - - - - - | - - - * | <-- DATA1
13   -> - * - - - - - * - - - - - | - - - * | <-- DATA2
7    -> - - * - - - - - * - - - - | - - - * | <-- DATA3
8    -> - - - * - - - - - * - - - | - - - * | <-- DATA4
9    -> - - - - * - - - - - * - - | - - - * | <-- DATA5
10   -> - - - - - * - - - - - * - | - - - * | <-- DATA6
67   -> - - - - - - - - - - - - - | - - * - | <-- DATA9
68   -> - - - - - - - - - - - - - | - - * - | <-- DATA10
2    -> - - - - - - - - - - - - - | - * - - | <-- DATA15
1    -> - - - - - - - - - - - - - | - * - - | <-- DATA16
14   -> * * * * * * * * * * * * * | - * * * | <-- maincol0
15   -> * * * * * * * * * * * * * | - * * * | <-- maincol1
17   -> * * * * * * * * * * * * - | - * * * | <-- subcol0
18   -> * * * * * * * * * * * * - | - * * * | <-- subcol1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                             e:\traffic\select.rpt
select

** EQUATIONS **

DATA1    : INPUT;
DATA2    : INPUT;
DATA3    : INPUT;
DATA4    : INPUT;
DATA5    : INPUT;
DATA6    : INPUT;
DATA7    : INPUT;
DATA8    : INPUT;
DATA9    : INPUT;
DATA10   : INPUT;
DATA11   : INPUT;
DATA12   : INPUT;
DATA13   : INPUT;
DATA14   : INPUT;
DATA15   : INPUT;
DATA16   : INPUT;
maincol0 : INPUT;
maincol1 : INPUT;
subcol0  : INPUT;
subcol1  : INPUT;

-- Node name is 'DATAOUT01' 
-- Equation name is 'DATAOUT01', location is LC052, type is output.
 DATAOUT01 = LCELL( _EQ001 $ !maincol1);
  _EQ001 =  DATA1 & !maincol0 &  maincol1 &  subcol0 & !subcol1
         #  maincol0 & !maincol1 &  subcol0 &  subcol1
         #  DATA1 &  maincol1 & !subcol0 & !subcol1
         # !DATA1 &  maincol0 & !maincol1;

-- Node name is 'DATAOUT02' 
-- Equation name is 'DATAOUT02', location is LC057, type is output.
 DATAOUT02 = LCELL( _EQ002 $ !maincol1);
  _EQ002 =  DATA2 & !maincol0 &  maincol1 &  subcol0 & !subcol1
         #  maincol0 & !maincol1 &  subcol0 &  subcol1
         #  DATA2 &  maincol1 & !subcol0 & !subcol1
         # !DATA2 &  maincol0 & !maincol1;

-- Node name is 'DATAOUT03' 
-- Equation name is 'DATAOUT03', location is LC059, type is output.
 DATAOUT03 = LCELL( _EQ003 $ !maincol1);
  _EQ003 =  DATA3 & !maincol0 &  maincol1 &  subcol0 & !subcol1
         #  maincol0 & !maincol1 &  subcol0 &  subcol1
         #  DATA3 &  maincol1 & !subcol0 & !subcol1
         # !DATA3 &  maincol0 & !maincol1;

-- Node name is 'DATAOUT04' 
-- Equation name is 'DATAOUT04', location is LC064, type is output.
 DATAOUT04 = LCELL( _EQ004 $  GND);
  _EQ004 =  DATA4 &  maincol0 & !maincol1 & !subcol0 &  subcol1
         #  DATA4 & !maincol0 &  maincol1 &  subcol0 & !subcol1
         #  DATA4 &  maincol0 & !maincol1 &  subcol0 & !subcol1
         #  DATA4 & !maincol0 & !maincol1
         # !_LC050 & !subcol0 & !subcol1;

-- Node name is 'DATAOUT05' 
-- Equation name is 'DATAOUT05', location is LC062, type is output.
 DATAOUT05 = LCELL( _EQ005 $  GND);
  _EQ005 =  DATA5 &  maincol0 & !maincol1 & !subcol0 &  subcol1
         #  DATA5 & !maincol0 &  maincol1 &  subcol0 & !subcol1
         #  DATA5 &  maincol0 & !maincol1 &  subcol0 & !subcol1
         #  DATA5 & !maincol0 & !maincol1
         # !_LC050 & !subcol0 & !subcol1;

-- Node name is 'DATAOUT06' 
-- Equation name is 'DATAOUT06', location is LC054, type is output.
 DATAOUT06 = LCELL( _EQ006 $  GND);
  _EQ006 =  DATA6 &  maincol0 & !maincol1 & !subcol0 &  subcol1
         #  DATA6 & !maincol0 &  maincol1 &  subcol0 & !subcol1
         #  DATA6 &  maincol0 & !maincol1 &  subcol0 & !subcol1
         #  DATA6 & !maincol0 & !maincol1
         # !_LC050 & !subcol0 & !subcol1;

-- Node name is 'DATAOUT07' 
-- Equation name is 'DATAOUT07', location is LC046, type is output.
 DATAOUT07 = LCELL( _EQ007 $ !maincol1);
  _EQ007 =  DATA7 & !maincol0 &  maincol1 &  subcol0 & !subcol1
         #  maincol0 & !maincol1 &  subcol0 &  subcol1
         #  DATA7 &  maincol1 & !subcol0 & !subcol1
         # !DATA7 &  maincol0 & !maincol1;

-- Node name is 'DATAOUT08' 
-- Equation name is 'DATAOUT08', location is LC038, type is output.
 DATAOUT08 = LCELL( _EQ008 $ !maincol1);
  _EQ008 =  DATA8 & !maincol0 &  maincol1 &  subcol0 & !subcol1
         #  maincol0 & !maincol1 &  subcol0 &  subcol1
         #  DATA8 &  maincol1 & !subcol0 & !subcol1
         # !DATA8 &  maincol0 & !maincol1;

-- Node name is 'DATAOUT09' 
-- Equation name is 'DATAOUT09', location is LC040, type is output.
 DATAOUT09 = LCELL( _EQ009 $ !maincol1);
  _EQ009 =  DATA9 & !maincol0 &  maincol1 &  subcol0 & !subcol1
         #  maincol0 & !maincol1 &  subcol0 &  subcol1
         #  DATA9 &  maincol1 & !subcol0 & !subcol1
         # !DATA9 &  maincol0 & !maincol1;

-- Node name is 'DATAOUT010' 
-- Equation name is 'DATAOUT010', location is LC041, type is output.
 DATAOUT010 = LCELL( _EQ010 $ !maincol1);
  _EQ010 =  DATA10 & !maincol0 &  maincol1 &  subcol0 & !subcol1
         #  maincol0 & !maincol1 &  subcol0 &  subcol1
         #  DATA10 &  maincol1 & !subcol0 & !subcol1
         # !DATA10 &  maincol0 & !maincol1;

-- Node name is 'DATAOUT011' 
-- Equation name is 'DATAOUT011', location is LC045, type is output.
 DATAOUT011 = LCELL( _EQ011 $ !maincol1);
  _EQ011 =  DATA11 & !maincol0 &  maincol1 &  subcol0 & !subcol1
         #  maincol0 & !maincol1 &  subcol0 &  subcol1
         #  DATA11 &  maincol1 & !subcol0 & !subcol1
         # !DATA11 &  maincol0 & !maincol1;

-- Node name is 'DATAOUT11' 
-- Equation name is 'DATAOUT11', location is LC060, type is output.
 DATAOUT11 = LCELL( _EQ012 $  GND);
  _EQ012 =  DATA1 & !maincol1 & !subcol0
         #  DATA1 & !maincol1 & !subcol1
         # !maincol0 &  maincol1 & !subcol1
         #  DATA1 & !maincol0 & !maincol1
         #  maincol0 & !subcol0 & !subcol1;

-- Node name is 'DATAOUT012' 
-- Equation name is 'DATAOUT012', location is LC048, type is output.
 DATAOUT012 = LCELL( _EQ013 $ !maincol1);
  _EQ013 =  DATA12 & !maincol0 &  maincol1 &  subcol0 & !subcol1
         #  maincol0 & !maincol1 &  subcol0 &  subcol1
         #  DATA12 &  maincol1 & !subcol0 & !subcol1
         # !DATA12 &  maincol0 & !maincol1;

-- Node name is 'DATAOUT12' 
-- Equation name is 'DATAOUT12', location is LC056, type is output.
 DATAOUT12 = LCELL( _EQ014 $  GND);

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