📄 cp15.lst
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###############################################################################
# #
# 24/Apr/2009 23:50:11 #
# IAR ANSI C/C++ Compiler V5.20.0.20892/W32 EVALUATION for ARM #
# Copyright 1999-2008 IAR Systems AB. #
# #
# Cpu mode = arm #
# Endian = little #
# Source file = F:\Diplomovka\Atmel\getting-started-project-at91sam7x-ek #
# -iar\getting-started-project-at91sam7x-ek\at91lib\periph #
# erals\cp15\cp15.c #
# Command line = F:\Diplomovka\Atmel\getting-started-project-at91sam7x-ek #
# -iar\getting-started-project-at91sam7x-ek\at91lib\periph #
# erals\cp15\cp15.c -D at91sam7x128 -D flash -D #
# TRACE_LEVEL=4 -lC F:\Diplomovka\Atmel\getting-started-pr #
# oject-at91sam7x-ek-iar\getting-started-project-at91sam7x #
# -ek\at91sam7x-ek\getting-started-project\ewp\at91sam7x12 #
# 8_flash\List\ --remarks --diag_suppress Pe826,Pe1375 -o #
# F:\Diplomovka\Atmel\getting-started-project-at91sam7x-ek #
# -iar\getting-started-project-at91sam7x-ek\at91sam7x-ek\g #
# etting-started-project\ewp\at91sam7x128_flash\Obj\ #
# --no_cse --no_unroll --no_inline --no_code_motion #
# --no_tbaa --no_clustering --no_scheduling --debug #
# --endian=little --cpu=ARM7TDMI -e --fpu=None #
# --dlib_config "C:\Program Files (x86)\IAR #
# Systems\Embedded Workbench 5.0 #
# Evaluation\ARM\INC\DLib_Config_Full.h" -I #
# F:\Diplomovka\Atmel\getting-started-project-at91sam7x-ek #
# -iar\getting-started-project-at91sam7x-ek\at91sam7x-ek\g #
# etting-started-project\ewp\..\..\..\at91lib/peripherals\ #
# -I F:\Diplomovka\Atmel\getting-started-project-at91sam7 #
# x-ek-iar\getting-started-project-at91sam7x-ek\at91sam7x- #
# ek\getting-started-project\ewp\..\..\..\at91lib\ -I #
# F:\Diplomovka\Atmel\getting-started-project-at91sam7x-ek #
# -iar\getting-started-project-at91sam7x-ek\at91sam7x-ek\g #
# etting-started-project\ewp\..\..\..\at91lib/components\ #
# -I F:\Diplomovka\Atmel\getting-started-project-at91sam7x #
# -ek-iar\getting-started-project-at91sam7x-ek\at91sam7x-e #
# k\getting-started-project\ewp\..\..\..\at91lib/boards/at #
# 91sam7x-ek\ -I "C:\Program Files (x86)\IAR #
# Systems\Embedded Workbench 5.0 Evaluation\ARM\INC\" #
# --interwork --cpu_mode arm -Oh #
# List file = F:\Diplomovka\Atmel\getting-started-project-at91sam7x-ek #
# -iar\getting-started-project-at91sam7x-ek\at91sam7x-ek\g #
# etting-started-project\ewp\at91sam7x128_flash\List\cp15. #
# lst #
# Object file = F:\Diplomovka\Atmel\getting-started-project-at91sam7x-ek #
# -iar\getting-started-project-at91sam7x-ek\at91sam7x-ek\g #
# etting-started-project\ewp\at91sam7x128_flash\Obj\cp15.o #
# #
# #
###############################################################################
F:\Diplomovka\Atmel\getting-started-project-at91sam7x-ek-iar\getting-started-project-at91sam7x-ek\at91lib\peripherals\cp15\cp15.c
1 /* ----------------------------------------------------------------------------
2 * ATMEL Microcontroller Software Support
3 * ----------------------------------------------------------------------------
4 * Copyright (c) 2008, Atmel Corporation
5 *
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * - Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the disclaimer below.
13 *
14 * Atmel's name may not be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 * ----------------------------------------------------------------------------
28 */
29
30 //-----------------------------------------------------------------------------
31 // Headers
32 //-----------------------------------------------------------------------------
33
34 #include <board.h>
35
36 #ifdef CP15_PRESENT
37
38 #include <utility/trace.h>
39 #include "cp15.h"
40
41 #if defined(__ICCARM__)
42 #include <intrinsics.h>
43 #endif
44
45
46 //-----------------------------------------------------------------------------
47 // Macros
48 //-----------------------------------------------------------------------------
49
50 //-----------------------------------------------------------------------------
51 // Defines
52 //-----------------------------------------------------------------------------
53 /*
54 #define CP15_RR_BIT 14 // RR bit Replacement strategy for ICache and DCache:
55 // 0 = Random replacement
56 // 1 = Round-robin replacement.
57
58 #define CP15_V_BIT 13 // V bit Location of exception vectors:
59 // 0 = Normal exception vectors selected address range = 0x0000 0000 to 0x0000 001C
60 // 1 = High exception vect selected, address range = 0xFFFF 0000 to 0xFFFF 001C
61 */
62 #define CP15_I_BIT 12 // I bit ICache enable/disable:
63 // 0 = ICache disabled
64 // 1 = ICache enabled
65 /*
66 #define CP15_R_BIT 9 // R bit ROM protection
67
68 #define CP15_S_BIT 8 // S bit System protection
69
70 #define CP15_B_BIT 7 // B bit Endianness:
71 // 0 = Little-endian operation
72 // 1 = Big-endian operation.
73 */
74 #define CP15_C_BIT 2 // C bit DCache enable/disable:
75 // 0 = Cache disabled
76 // 1 = Cache enabled
77 /*
78 #define CP15_A_BIT 1 // A bit Alignment fault enable/disable:
79 // 0 = Data address alignment fault checking disabled
80 // 1 = Data address alignment fault checking enabled
81 */
82 #define CP15_M_BIT 0 // M bit MMU enable/disable: 0 = disabled 1 = enabled.
83 // 0 = disabled
84 // 1 = enabled
85
86
87 //-----------------------------------------------------------------------------
88 // Global functions
89 //-----------------------------------------------------------------------------
90
91 //------------------------------------------------------------------------------
92 /// Check Instruction Cache
93 /// \return 0 if I_Cache disable, 1 if I_Cache enable
94 //------------------------------------------------------------------------------
95 unsigned int CP15_Is_I_CacheEnabled(void)
96 {
97 unsigned int control;
98
99 control = _readControlRegister();
100 return ((control & (1 << CP15_I_BIT)) != 0);
101 }
102
103 //------------------------------------------------------------------------------
104 /// Enable Instruction Cache
105 //------------------------------------------------------------------------------
106 void CP15_Enable_I_Cache(void)
107 {
108 unsigned int control;
109
110 control = _readControlRegister();
111
112 // Check if cache is disabled
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