📄 board_lowlevel.lst
字号:
115 **********************************/
116 /* 48MHz = 1 wait state */
117 #if defined(at91sam7x512)
118 AT91C_BASE_EFC0->EFC_FMR = AT91C_MC_FWS_1FWS;
119 AT91C_BASE_EFC1->EFC_FMR = AT91C_MC_FWS_1FWS;
120 #elif defined(at91sam7x128) || defined(at91sam7x256)
121 AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS;
\ 00000004 9F00E0E3 MVN R0,#+159
\ 00000008 401FA0E3 MOV R1,#+256
\ 0000000C 001080E5 STR R1,[R0, #+0]
122 #else
123 #error No chip definition ?
124 #endif
125
126 /* Initialize main oscillator
127 ****************************/
128 AT91C_BASE_PMC->PMC_MOR = BOARD_OSCOUNT | AT91C_CKGR_MOSCEN;
\ 00000010 D00FC0E3 BIC R0,R0,#0x340
\ 00000014 0110A0E3 MOV R1,#+1
\ 00000018 401C81E3 ORR R1,R1,#0x4000
\ 0000001C 001080E5 STR R1,[R0, #+0]
129 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
\ ??LowLevelInit_0:
\ 00000020 9700E0E3 MVN R0,#+151
\ 00000024 C00FC0E3 BIC R0,R0,#0x300
\ 00000028 000090E5 LDR R0,[R0, #+0]
\ 0000002C 010010E3 TST R0,#0x1
\ 00000030 FAFFFF0A BEQ ??LowLevelInit_0
130
131 /* Initialize PLL at 96MHz (96.109) and USB clock to 48MHz */
132 AT91C_BASE_PMC->PMC_PLLR = BOARD_USBDIV | BOARD_CKGR_PLL | BOARD_PLLCOUNT
133 | BOARD_MUL | BOARD_DIV;
\ 00000034 D300E0E3 MVN R0,#+211
\ 00000038 C00FC0E3 BIC R0,R0,#0x300
\ 0000003C 2C119FE5 LDR R1,??LowLevelInit_1 ;; 0x1048100e
\ 00000040 001080E5 STR R1,[R0, #+0]
134 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK));
\ ??LowLevelInit_2:
\ 00000044 9700E0E3 MVN R0,#+151
\ 00000048 C00FC0E3 BIC R0,R0,#0x300
\ 0000004C 000090E5 LDR R0,[R0, #+0]
\ 00000050 040010E3 TST R0,#0x4
\ 00000054 FAFFFF0A BEQ ??LowLevelInit_2
135
136 /* Wait for the master clock if it was already initialized */
137 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
\ ??LowLevelInit_3:
\ 00000058 9700E0E3 MVN R0,#+151
\ 0000005C C00FC0E3 BIC R0,R0,#0x300
\ 00000060 000090E5 LDR R0,[R0, #+0]
\ 00000064 080010E3 TST R0,#0x8
\ 00000068 FAFFFF0A BEQ ??LowLevelInit_3
138
139 /* Switch to fast clock
140 **********************/
141 /* Switch to slow clock + prescaler */
142 AT91C_BASE_PMC->PMC_MCKR = BOARD_PRESCALER;
\ 0000006C CF00E0E3 MVN R0,#+207
\ 00000070 C00FC0E3 BIC R0,R0,#0x300
\ 00000074 0410A0E3 MOV R1,#+4
\ 00000078 001080E5 STR R1,[R0, #+0]
143 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
\ ??LowLevelInit_4:
\ 0000007C 9700E0E3 MVN R0,#+151
\ 00000080 C00FC0E3 BIC R0,R0,#0x300
\ 00000084 000090E5 LDR R0,[R0, #+0]
\ 00000088 080010E3 TST R0,#0x8
\ 0000008C FAFFFF0A BEQ ??LowLevelInit_4
144
145 /* Switch to fast clock + prescaler */
146 AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
\ 00000090 CF00E0E3 MVN R0,#+207
\ 00000094 C00FC0E3 BIC R0,R0,#0x300
\ 00000098 000090E5 LDR R0,[R0, #+0]
\ 0000009C 030080E3 ORR R0,R0,#0x3
\ 000000A0 CF10E0E3 MVN R1,#+207
\ 000000A4 C01FC1E3 BIC R1,R1,#0x300
\ 000000A8 000081E5 STR R0,[R1, #+0]
147 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
\ ??LowLevelInit_5:
\ 000000AC 380081E2 ADD R0,R1,#+56
\ 000000B0 000090E5 LDR R0,[R0, #+0]
\ 000000B4 080010E3 TST R0,#0x8
\ 000000B8 FBFFFF0A BEQ ??LowLevelInit_5
148
149 /* Initialize AIC
150 ****************/
151 AT91C_BASE_AIC->AIC_IDCR = 0xFFFFFFFF;
\ 000000BC DB00E0E3 MVN R0,#+219
\ 000000C0 E00EC0E3 BIC R0,R0,#0xE00
\ 000000C4 0010E0E3 MVN R1,#+0
\ 000000C8 A41000E4 STR R1,[R0], #-164
152 AT91C_BASE_AIC->AIC_SVR[0] = (unsigned int) defaultFiqHandler;
\ 000000CC A0109FE5 LDR R1,??LowLevelInit_1+0x4 ;; defaultFiqHandler
\ 000000D0 001080E5 STR R1,[R0, #+0]
153 for (i = 1; i < 31; i++) {
\ 000000D4 040080E3 ORR R0,R0,#0x4
\ 000000D8 1E10A0E3 MOV R1,#+30
\ 000000DC 94209FE5 LDR R2,??LowLevelInit_1+0x8 ;; defaultIrqHandler
154
155 AT91C_BASE_AIC->AIC_SVR[i] = (unsigned int) defaultIrqHandler;
\ ??LowLevelInit_6:
\ 000000E0 042080E4 STR R2,[R0], #+4
156 }
\ 000000E4 011051E2 SUBS R1,R1,#+1
\ 000000E8 FCFFFF1A BNE ??LowLevelInit_6
157 AT91C_BASE_AIC->AIC_SPU = (unsigned int) defaultSpuriousHandler;
\ 000000EC CB00E0E3 MVN R0,#+203
\ 000000F0 E00EC0E3 BIC R0,R0,#0xE00
\ 000000F4 80109FE5 LDR R1,??LowLevelInit_1+0xC ;; defaultSpuriousHandler
\ 000000F8 001080E5 STR R1,[R0, #+0]
158
159 // Unstack nested interrupts
160 for (i = 0; i < 8 ; i++) {
\ 000000FC 0800A0E3 MOV R0,#+8
\ 00000100 CF10E0E3 MVN R1,#+207
\ 00000104 E01EC1E3 BIC R1,R1,#0xE00
\ 00000108 0020A0E3 MOV R2,#+0
161
162 AT91C_BASE_AIC->AIC_EOICR = 0;
\ ??LowLevelInit_7:
\ 0000010C 002081E5 STR R2,[R1, #+0]
163 }
\ 00000110 010050E2 SUBS R0,R0,#+1
\ 00000114 FCFFFF1A BNE ??LowLevelInit_7
164
165 // Enable Debug mode
166 AT91C_BASE_AIC->AIC_DCR = AT91C_AIC_DCR_PROT;
\ 00000118 080081E3 ORR R0,R1,#0x8
\ 0000011C 0110A0E3 MOV R1,#+1
\ 00000120 001080E5 STR R1,[R0, #+0]
167
168 /* Watchdog initialization
169 *************************/
170 AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
\ 00000124 BB00E0E3 MVN R0,#+187
\ 00000128 800FC0E3 BIC R0,R0,#0x200
\ 0000012C 801CA0E3 MOV R1,#+32768
\ 00000130 001080E5 STR R1,[R0, #+0]
171
172 /* Remap
173 *******/
174 BOARD_RemapRam();
\ 00000134 ........ BL BOARD_RemapRam
175
176 // Disable RTT and PIT interrupts (potential problem when program A
177 // configures RTT, then program B wants to use PIT only, interrupts
178 // from the RTT will still occur since they both use AT91C_ID_SYS)
179 AT91C_BASE_RTTC->RTTC_RTMR &= ~(AT91C_RTTC_ALMIEN | AT91C_RTTC_RTTINCIEN);
\ 00000138 DF00E0E3 MVN R0,#+223
\ 0000013C 800FC0E3 BIC R0,R0,#0x200
\ 00000140 000090E5 LDR R0,[R0, #+0]
\ 00000144 C00BC0E3 BIC R0,R0,#0x30000
\ 00000148 DF10E0E3 MVN R1,#+223
\ 0000014C 801FC1E3 BIC R1,R1,#0x200
\ 00000150 000081E5 STR R0,[R1, #+0]
180 AT91C_BASE_PITC->PITC_PIMR &= ~AT91C_PITC_PITIEN;
\ 00000154 100081E3 ORR R0,R1,#0x10
\ 00000158 000090E5 LDR R0,[R0, #+0]
\ 0000015C 8007C0E3 BIC R0,R0,#0x2000000
\ 00000160 101081E3 ORR R1,R1,#0x10
\ 00000164 000081E5 STR R0,[R1, #+0]
181 }
\ 00000168 0140BDE8 POP {R0,LR}
\ 0000016C 1EFF2FE1 BX LR ;; return
\ ??LowLevelInit_1:
\ 00000170 0E104810 DC32 0x1048100e
\ 00000174 ........ DC32 defaultFiqHandler
\ 00000178 ........ DC32 defaultIrqHandler
\ 0000017C ........ DC32 defaultSpuriousHandler
182
Maximum stack usage in bytes:
Function .cstack
-------- -------
LowLevelInit 0
defaultFiqHandler 0
defaultIrqHandler 0
defaultSpuriousHandler 0
Section sizes:
Function/Label Bytes
-------------- -----
defaultSpuriousHandler 4
defaultFiqHandler 4
defaultIrqHandler 4
LowLevelInit 384
396 bytes in section .text
396 bytes of CODE memory
Errors: none
Warnings: none
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -