xllp_lcd.h

Windows CE 6.0 BSP for VOIP sample phone. Intel PXA270 platform.

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this sample source code is subject to the terms of the Microsoft
// license agreement under which you licensed this sample source code. If
// you did not accept the terms of the license agreement, you are not
// authorized to use this sample source code. For the terms of the license,
// please see the license agreement between you and Microsoft or, if applicable,
// see the LICENSE.RTF on your install media or the root of your tools installation.
// THE SAMPLE SOURCE CODE IS PROVIDED "AS IS", WITH NO WARRANTIES OR INDEMNITIES.
//
#include "xllp_defs.h"
#include "xllp_serialization.h"
#include "xllp_clkmgr.h"

#ifndef XLLP_LCD
#define XLLP_LCD

//
// LCD Controller Register Definitions, associated data structures and bit macros
//

typedef struct 
{
    unsigned short palette[512];
}LCD_PALETTE;

typedef struct  
{
    unsigned int FDADR;     // Pointer to next frame descriptor (Physical address)
    unsigned int FSADR;     // Pointer to the data (Physical address)
    unsigned int FIDR;      // Frame descriptor ID
    unsigned int LDCMD;     // DMA command
    unsigned int PHYSADDR;  // PHYSADDR contains the physical address of this descriptor.
}LCD_FRAME_DESCRIPTOR;

typedef struct
{
    unsigned int sscr0;         // 0x.... 0000
    unsigned int sscr1;         // 0x.... 0004
    unsigned int sssr;          // 0x.... 0008
    unsigned int ssitr;         // 0x.... 000C
    unsigned int ssdr;          // 0x.... 0010
    unsigned int rsvd1[5];      // 0x.... 0014
    unsigned int ssto;          // 0x.... 0028
    unsigned int sspsp;         // 0x.... 002C
    unsigned int sstsa;         // 0x.... 0030
    unsigned int ssrsa;         // 0x.... 0034
    unsigned int sstss;         // 0x.... 0038
    unsigned int ssacd;         // 0x.... 003C
} XLLP_SSPREGS_T , *P_XLLP_SSPREGS_T;

typedef struct  
{
    unsigned int LCCR0;         // 0x4400 0000
    unsigned int LCCR1;         // 0x4400 0004
    unsigned int LCCR2;         // 0x4400 0008
    unsigned int LCCR3;         // 0x4400 000C
    unsigned int LCCR4;         // 0x4400 0010
    unsigned int LCCR5;         // 0x4400 0014
    unsigned int reserved0[2];  // 0x4400 0018
    unsigned int FBR0;          // 0x4400 0020
    unsigned int FBR1;          // 0x4400 0024
    unsigned int FBR2;          // 0x4400 0028
    unsigned int FBR3;          // 0x4400 002C
    unsigned int FBR4;          // 0x4400 0030
    unsigned int LCSR1;         // 0x4400 0034
    unsigned int LCSR0;         // 0x4400 0038
    unsigned int LIIDR;         // 0x4400 003C
    unsigned int TRGBR;         // 0x4400 0040
    unsigned int TCR;           // 0x4400 0044
    unsigned int reserved1[2];  // 0x4400 0048
    unsigned int OVL1C1;        // 0x4400 0050
    unsigned int reserved2[3];  // 0x4400 0054
    unsigned int OVL1C2;        // 0x4400 0060
    unsigned int reserved3[3];  // 0x4400 0064
    unsigned int OVL2C1;        // 0x4400 0070
    unsigned int reserved4[3];  // 0x4400 0074
    unsigned int OVL2C2;        // 0x4400 0080
    unsigned int reserved5[3];  // 0x4400 0084
    unsigned int CCR;           // 0x4400 0090
    unsigned int reserved6[27]; // 0x4400 0094
    unsigned int CMDCR;         // 0x4400 0100
    unsigned int PRSR;          // 0x4400 0104
    unsigned int reserved7[2];  // 0x4400 0108
    unsigned int FBR5;          // 0x4400 0110
    unsigned int FBR6;          // 0x4400 0114
    unsigned int reserved8[58]; // 0x4400 0118
    unsigned int FDADR0;        // 0x4400 0200
    unsigned int FSADR0;        // 0x4400 0204
    unsigned int FIDR0;         // 0x4400 0208
    unsigned int LDCMD0;        // 0x4400 020C
    unsigned int FDADR1;        // 0x4400 0210
    unsigned int FSADR1;        // 0x4400 0214
    unsigned int FIDR1;         // 0x4400 0218
    unsigned int LDCMD1;        // 0x4400 021C
    unsigned int FDADR2;        // 0x4400 0220
    unsigned int FSADR2;        // 0x4400 0224
    unsigned int FIDR2;         // 0x4400 0228
    unsigned int LDCMD2;        // 0x4400 022C
    unsigned int FDADR3;        // 0x4400 0230
    unsigned int FSADR3;        // 0x4400 0234
    unsigned int FIDR3;         // 0x4400 0238
    unsigned int LDCMD3;        // 0x4400 023C
    unsigned int FDADR4;        // 0x4400 0240
    unsigned int FSADR4;        // 0x4400 0244
    unsigned int FIDR4;         // 0x4400 0248
    unsigned int LDCMD4;        // 0x4400 024C
    unsigned int FDADR5;        // 0x4400 0250
    unsigned int FSADR5;        // 0x4400 0254
    unsigned int FIDR5;         // 0x4400 0258
    unsigned int LDCMD5;        // 0x4400 025C
    unsigned int FDADR6;        // 0x4400 0260
    unsigned int FSADR6;        // 0x4400 0264
    unsigned int FIDR6;         // 0x4400 0268
    unsigned int LDCMD6;        // 0x4400 026C

}LCDRegs;

typedef struct
{
    unsigned long OverlayHeight;
    unsigned long OverlayWidth;
    unsigned long X_Position;
    unsigned long Y_Position;
    unsigned long Format;
    unsigned long DegradeBaseFrame;
    unsigned long CH2_Y;
    unsigned long CH3_Cb;
    unsigned long CH4_Cr;
    unsigned long OverlayBPP;
    unsigned long TmpBPP;
    unsigned long ch2_size;
    unsigned long ch3_size;
    unsigned long ch4_size;
} XLLP_OVERLAY_T, *P_XLLP_OVERLAY_T;

typedef struct
{
    XLLP_VUINT32_T *GPIO;                   
    XLLP_VUINT32_T *CLKMan;                 
    XLLP_VUINT32_T *LCDC;
    XLLP_VUINT32_T *SSP;
    XLLP_VUINT32_T *OST;
    unsigned long DisplayType;
    unsigned long FrameBufferWidth;
    unsigned long FrameBufferHeight;
    unsigned long FrameBufferSize;
    unsigned long PaletteSize;
    unsigned long BPP;
    unsigned long PixelDataFormat;
    unsigned long CurrentPage;
    // frame buffers
    unsigned long _FRAME_BUFFER_BASE_PHYSICAL;              
    unsigned long _PALETTE_BUFFER_BASE_PHYSICAL;
    unsigned long _OVERLAY2_Y_CHANNEL_BASE_PHYSICAL;
    unsigned long _OVERLAY2_Cb_CHANNEL_BASE_PHYSICAL;
    unsigned long _OVERLAY2_Cr_CHANNEL_BASE_PHYSICAL;
    // frame descriptors
    unsigned long _DMA_CHANNEL_0_FRAME_DESCRIPTOR_BASE_PHYSICAL;    
    unsigned long _DMA_CHANNEL_1_FRAME_DESCRIPTOR_BASE_PHYSICAL;
    unsigned long _DMA_CHANNEL_0_ALT_FRAME_DESCRIPTOR_BASE_PHYSICAL;
    unsigned long _PALETTE_FRAME_DESCRIPTOR_BASE_PHYSICAL;
    unsigned long _DMA_CHANNEL_2_Y_FRAME_DESCRIPTOR_BASE_PHYSICAL;
    unsigned long _DMA_CHANNEL_3_Cb_FRAME_DESCRIPTOR_BASE_PHYSICAL;
    unsigned long _DMA_CHANNEL_4_Cr_FRAME_DESCRIPTOR_BASE_PHYSICAL;
    volatile LCD_FRAME_DESCRIPTOR *frameDescriptorCh0fd1;
    volatile LCD_FRAME_DESCRIPTOR *frameDescriptorCh0fd2;
    volatile LCD_FRAME_DESCRIPTOR *frameDescriptorCh1;
    volatile LCD_FRAME_DESCRIPTOR *frameDescriptorPalette;
    volatile LCD_FRAME_DESCRIPTOR *frameDescriptorTemp;
    volatile LCD_FRAME_DESCRIPTOR *frameDescriptorCh2_YCbCr_Y; 
    volatile LCD_FRAME_DESCRIPTOR *frameDescriptorCh3_YCbCr_Cb;
    volatile LCD_FRAME_DESCRIPTOR *frameDescriptorCh4_YCbCr_Cr;

} XLLP_LCD_T, *P_XLLP_LCD_T;

#define NONE        0

// Toshiba 640x480 LTM04C380K display
#define LTM04C380K  1

// Sharp 220x176 LQ64D341 display
#define LQ64D341    2

// Lubbock 640x480 passive
#define LM8V31      4       

// Sharp 240x320 Native Portrait QVGA display
#define LTM035A776C 5

// Sharp LS022Q8DD06 Sharp 240 x 320 for ZOAR
#define LS022Q8DD06 6

// Renesas HD66781 Source Driver
#define HD66781   7

// Use the following for base frame values
#define BPP_1           0x001
#define BPP_2           0x002
#define BPP_4           0x004
#define BPP_8           0x008
#define BPP_16          0x010
#define BPP_18          0x020
#define BPP_18_PACKED   0x040
#define BPP_19          0x080
#define BPP_19_PACKED   0x100
#define BPP_24          0x200
#define BPP_25          0x400

// Use the following for overlay values
#define O_BPP_4             0x2
#define O_BPP_8             0x3
#define O_BPP_16            0x4
#define O_BPP_18            0x5
#define O_BPP_18_PACKED     0x6
#define O_BPP_19            0x7
#define O_BPP_19_PACKED     0x8
#define O_BPP_24            0x9
#define O_BPP_25            0xA




// Use the following for PixelDataFormat values
#define PDFOR_00        0x0
#define PDFOR_01        0x1
#define PDFOR_10        0x2
#define PDFOR_11        0x3

// Use the following for SuspendType
#define Suspend_Graceful    0
#define Suspend_Immediate   1

#define CLK_SSP3 0x00000010
#define CLK_LCD  0x00010000
#define CLK_SRAM 0x00100000

#define INTERNAL_MEMORY_START 0x5C000000
#define INTERNAL_MEMORY_END   (INTERNAL_MEMORY_START + 0x0003FFFF)

#define LTM04C380K_PIXEL_CLOCK_FREQUENCY 2518   // 25.18 MHz
#define LM8V31_PIXEL_CLOCK_FREQUENCY      454   // 4.54 MHz
#define LQ64D341_PIXEL_CLOCK_FREQUENCY    385   // 3.85 MHz
#define LTM035A776C_PIXEL_CLOCK_FREQUENCY 910   // 9.10 MHz
#define HD66781_PIXEL_CLOCK_FREQUENCY     270   // 2.70 Mhz 
#define LS022Q8DD06_PIXEL_CLOCK_FREQUENCY 540   // 5.40 MHz


// Use the following for configuring overlay 2 format
#define FORMAT_RGB          0x0
#define FORMAT_PACKED_444   0x1
#define FORMAT_PLANAR_444   0x2
#define FORMAT_PLANAR_422   0x3
#define FORMAT_PLANAR_420   0x4

// Public API functions
XLLP_STATUS_T XllpLCDInit(P_XLLP_LCD_T pXllpLCD);
XLLP_STATUS_T XllpLCD_Overlay2_Enable(P_XLLP_LCD_T pXllpLCD, P_XLLP_OVERLAY_T pXllpOverlay);