ssplink.c

Windows CE 6.0 BSP for VOIP sample phone. Intel PXA270 platform.

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this sample source code is subject to the terms of the Microsoft
// license agreement under which you licensed this sample source code. If
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// please see the license agreement between you and Microsoft or, if applicable,
// see the LICENSE.RTF on your install media or the root of your tools installation.
// THE SAMPLE SOURCE CODE IS PROVIDED "AS IS", WITH NO WARRANTIES OR INDEMNITIES.
//

/* Copyright 1999,2000,2001 Intel Corp.  */
/*
** Portions of the source code contained or described herein and all documents
** related to such source code (Material) are owned by Intel Corporation
** or its suppliers or licensors and is licensed by Microsoft Corporation for distribution.
** Title to the Material remains with Intel Corporation or its suppliers and licensors.
** Use of the Materials is subject to the terms of the Microsoft license agreement which accompanied the Materials.
** No other license under any patent, copyright, trade secret or other intellectual
** property right is granted to or conferred upon you by disclosure or
** delivery of the Materials, either expressly, by implication, inducement,
** estoppel or otherwise
** Some portion of the Materials may be copyrighted by Microsoft Corporation.
*/

/*++
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.

Module Name:

  ssplink.c

Abstract:

Functions:

Revision History:

--*/
//--------------------------------------------------------------------------------------
// Include Files
//--------------------------------------------------------------------------------------
#include  <windows.h>
#include  <types.h>
#include  <memory.h>

#include "bulverde_base_regs.h"
#include "xllp_gpio.h"
#include "xllp_lcd.h"
#include "ssplink.h"


//========================
#define DEBUG_ZONE   0
#define DEBUG_ERROR  1
//========================

extern void msWait(unsigned int);
extern void usWait(unsigned int);

//-----------------------------------------------------------------------------------------
// Global Variables.
//-----------------------------------------------------------------------------------------
volatile  XLLP_SSPREGS_T *g_pSSPRegs=NULL;

//------------------------------------------------------------------------------------------------------------
// Function: SSPLinkInit
//
// Purpose:  Initialises the SSP Controller of the XScale Processor.
// Returns:  returns void.
//
//-------------------------------------------------------------------------------------------------------------
void SSPLinkInit(volatile XLLP_SSPREGS_T *v_pSSPRegs,
                 unsigned long DisplayType)
{
    // Make global copy of SSP reg pointer

    g_pSSPRegs = v_pSSPRegs;

    switch(DisplayType)
    {
    case HD66781:
        // Sets up the SSP controller to Xmit 8 bit Data to the Renesas, frames are sent in the SPI format
        // The framing is done manually by sending three bytes at a time and waiting between frames
        g_pSSPRegs->sscr0 = 0x00000000;
        g_pSSPRegs->sscr0 = SSCR0_TIM | SSCR0_RIM | SSCR0_SCR(0x8) | SSCR0_DSS(7);
        g_pSSPRegs->sscr1 = SSCR1_SPH | SSCR1_SPO;
        g_pSSPRegs->sscr0 |= SSCR0_SSE;
        DEBUGMSG (1,(TEXT("SSP link initialization complete!\r\n")));
        break;
    default:
        RETAILMSG (1, (TEXT("Display type is not using SSP link: %d.\r\n"),DisplayType));
    }

}

//------------------------------------------------------------------------------------------------------------
// Function: ReadSSPLink
//
// Purpose:  Reads the data from the SSP's Rx FIFO.
//
// Returns:  returns TRUE
//
//-------------------------------------------------------------------------------------------------------------
BOOL SSPLinkRead(unsigned int *data)
{
    while((g_pSSPRegs->sssr & SSP_RECEIVE_FIFO_NOT_EMPTY)==0);

    *data=g_pSSPRegs->ssdr & 0xFFFF;

    return(TRUE);
}

//------------------------------------------------------------------------------------------------------------
// Function: WriteSSPLink
//
// Purpose:  Writes the data to the SSP's Tx FIFO. Currently this is a busy wait read operation. It may not hurt
//           because the bandwidth requirements for the touch driver is low. However this can still be improved in 2 ways
//           one would be to increase the bit rate of the SSP Link and the other would be to make it interrupt driven.
//
// Returns:  returns TRUE
//
//-------------------------------------------------------------------------------------------------------------


BOOL SSPLinkWrite(unsigned char start, unsigned int data)
{
    usWait(500);
    while((g_pSSPRegs->sssr & SSP_TRANSMIT_FIFO_NOT_FULL) == 0);
    g_pSSPRegs->ssdr = start;
    while((g_pSSPRegs->sssr & SSP_TRANSMIT_FIFO_NOT_FULL) == 0);
    g_pSSPRegs->ssdr = (data >> 8) & 0xFF;
    while((g_pSSPRegs->sssr & SSP_TRANSMIT_FIFO_NOT_FULL) == 0);
    g_pSSPRegs->ssdr = data & 0xFF;

    return(TRUE);
}



//----------------------------------------------------------------------------------------------------------------
//
// Function SSPGpioConfigure
//
// Purpose: This function must be called from the power handler of the respective drivers using this
// library. This function will configure the GPIO pins according to the functionality shown in the table below
//
//    Signals     GPIO    Direction   Alternate Function
//    SSPCLK      84      output        1
//    SSPSFRM     83      output        1
//    SSPRXD      82      input         1
//    SSPTXD      81      output        1
//
//----------------------------------------------------------------------------------------------------------------

BOOL SSPLinkGpioConfigure(volatile P_XLLP_GPIO_T v_pGPIORegs)
{
    if(v_pGPIORegs)
    {

        v_pGPIORegs->GPDR2 |= 0x001A0000;

        v_pGPIORegs->GAFR2_U &= ~(0x000003FC);
        v_pGPIORegs->GAFR2_U |=   0x00000154;

        return(TRUE);
    }

    return(FALSE);

}
//------------------------------------------------------------------------------------------------------------
// Function: SetupSSP
//
// Purpose:  Allocates the necessary registers, configures the necessary GPIO and initialises the SSP Link
// Returns:  returns TRUE if it could successfully do all this.
//
//-------------------------------------------------------------------------------------------------------------
BOOL SSPLinkSetup(P_XLLP_LCD_T pXllpLCD)
{

    volatile XLLP_CLKMGR_T *p_CLKRegs;

    volatile XLLP_SSPREGS_T *v_pSSPRegs;

             DWORD FIFOCnt,i;

    // Turn on SSP clock
    p_CLKRegs = (XLLP_CLKMGR_T *) pXllpLCD->CLKMan;

    // Get pointer to SSP3 registers
    v_pSSPRegs = (XLLP_SSPREGS_T *) pXllpLCD->SSP;


    // Turn on SSP3 clock
    p_CLKRegs->cken = (p_CLKRegs->cken & XLLP_CLKEN_MASK) | CLK_SSP3;


    if(v_pSSPRegs)
    {
        if(SSPLinkGpioConfigure((XLLP_GPIO_T *)pXllpLCD->GPIO))
            SSPLinkInit(v_pSSPRegs, pXllpLCD->DisplayType);
        else
            return(FALSE);
    }
    else
        return(FALSE);

    msWait(5);

    // Flush FIFO
    FIFOCnt = 0x10;
    for (i=0; i<FIFOCnt; i++)
    {
        g_pSSPRegs->ssdr = 0x0;
    }

    while ((g_pSSPRegs->ssdr != 0x0000) && FIFOCnt--)
    {
        g_pSSPRegs->sscr0 &= ~SSCR0_SSE;
        g_pSSPRegs->sscr0 |= SSCR0_SSE;
        msWait(5);
        g_pSSPRegs->ssdr = 0x0;
        g_pSSPRegs->ssdr = 0x0;
        g_pSSPRegs->ssdr = 0x0;
    }


    return(TRUE);
}