sd.h

Windows CE 6.0 BSP for VOIP sample phone. Intel PXA270 platform.

#define MMC_CMDAT_RESPONSE_R2   0x02        // expected R2 response
#define MMC_CMDAT_RESPONSE_R3   0x03        // expected R3 response
#define MMC_CMDAT_DATA_EN       (1 << 2)    // data transfer to follow
#define MMC_CMDAT_DATA_WRITE    (1 << 3)    // data transfer is a write
#define MMC_CMDAT_STREAM        (1 << 4)    // data transfer is stream mode
#define MMC_CMDAT_EXPECT_BUSY   (1 << 5)    // the command uses busy signalling
#define MMC_CMDAT_INIT          (1 << 6)    // add init clocks
#define MMC_CMDAT_DMA_ENABLE    (1 << 7)    // enable DMA
#define MMC_CMDAT_SD_4DAT       (1 << 8)    // enable 4 bit data transfers
#define MMC_CMDAT_STOP_TRAN     (1 << 10)   // stop data transmission
#define MMC_CMDAT_SDIO_INT_EN   (1 << 11)   // enable controller to check for an SDIO interrupt from the card
#define MMC_CMDAT_SDIO_SUSPEND  (1 << 12)   // SDIO CMD 52, suspend current data transfer
#define MMC_CMDAT_SDIO_RESUME   (1 << 13)   // SDIO CMD 52, resume a suspended data transfer

    // bit definitions for MMC_STAT
#define MMC_STAT_READ_TIMEOUT          (1 << 0)
#define MMC_STAT_RESPONSE_TIMEOUT      (1 << 1)
#define MMC_STAT_WRITE_DATA_CRC_ERROR  (1 << 2)

#define MMC_STAT_READ_DATA_CRC_ERROR   (1 << 3)
#define MMC_STAT_SPI_READ_TOKEN_ERROR  (1 << 4)
#define MMC_STAT_RESPONSE_CRC_ERROR    (1 << 5)

#define MMC_STAT_CLOCK_ENABLED         (1 << 8)

#define MMC_STAT_FLASH_ERROR           (1 << 9)
#define MMC_STAT_SPI_WR_ERROR          (1 << 10)

#define MMC_STAT_DATA_TRANSFER_DONE    (1 << 11)
#define MMC_STAT_PROGRAM_DONE          (1 << 12)
#define MMC_STAT_END_CMD_RES           (1 << 13)

#define MMC_STAT_RD_STALLED            (1 << 14)
#define MMC_STAT_SDIO_INT              (1 << 15)
#define MMC_STAT_SDIO_SUSPEND_ACK      (1 << 16)

    // bit definition for MMC_PRTBUF
#define MMC_PRTBUF_BUFFER_PARTIAL_FULL (1 << 0)

typedef enum {
    Idle = -1 ,
    CommandSend = 1,
    CommandComplete = 2,
    ResponseWait = 3,
    WriteDataTransfer = 4,
    WriteDataTransferDone = 5,
    ProgramWait = 6,
    WriteDataDone = 7,
    ReadDataTransfer = 8,
    ReadDataTransferDone = 9,
    ReadDataDone = 10,
} SDHSTATE;


  // PXA27x hardware specific context
typedef struct _SDH_HARDWARE_CONTEXT {
   volatile BULVERDE_GPIO_REG     *pGPIORegisters;     // GPIO registers
   volatile BULVERDE_MMC_REG      *pSDMMCRegisters;    // SD/MMC controller registers
   volatile BULVERDE_CLKMGR_REG   *pClkMgrRegisters;   // Clock Manager registers
   volatile BULVERDE_DMA_REG      *pDMARegisters;      // DMA control registers

   LPCTSTR              pszActiveKey;
   HANDLE               hBusAccessHandle;
   PSDCARD_HC_CONTEXT   pHCContext;      // the host controller context
   PSD_BUS_REQUEST      pCurrentRequest; // Current Processing Request.
   BOOL                 fCurrentRequestFastPath;
   SD_API_STATUS        FastPathStatus;

   DWORD                dwSDMMCIrq;       // SD/MMC Controller interrupt IRQ value
   DWORD                dwSysintrSDMMC;   // SD/MMC controller interrupt SYSINTR value
   HANDLE               hControllerInterruptEvent;     // controller interrupt event
   HANDLE               hControllerInterruptThread;    // controller interrupt thread
   int                  ControllerIstThreadPriority;   // controller IST thread priority
   DWORD                dwControllerIstTimeout;
   DWORD                dwPollingModeSize;          // Fast path polling mode size.

   SYSTEM_INFO          systemInfo;
   
   PBYTE                pDMABuffer;             // pointer to buffers used for DMA transfers
   PHYSICAL_ADDRESS     pDMABufferPhys;         // physical address of the SMA buffer
   volatile DMADescriptorChannelType *pDMADescriptors;   // array of DMA descriptors
   PHYSICAL_ADDRESS     pDMADescriptorsPhys;    // physical address of the DMA descriptors buffer
   DWORD                dwDmaBufferSize;        // DMA buffer size (optional, may be 0)
   TCHAR                wszDmaIsrDll[1024];    // DMA ISR handler DLL name
   TCHAR                wszDmaIsrHandler[256]; // DMA ISR handler function name
   DWORD                dwDmaIRQ;               // DMA interrupt IRQ
   DWORD                dwDmaSysIntr;           // DMA interrupt SYSINT value
   HANDLE               hDMAIsrHandler;         // handle to DMA ISR handler
   HANDLE               hDMAInterruptEvent;     // DMA interrupt event
   DWORD                DmaIstThreadPriority;   // DMA IST thread priority
   HANDLE               hDmaInterruptThread;    // handle to the DMA IST thread
   DWORD                dwDmaChannel;           // DMA channel to use or 0xffffffff if no DMA
   BOOL                 fDMATransfer;           // if TRUE, data will be transferred via DMA
   BOOL                 fDMAUsingDriverBuffer;  // if TRUE, we transfer data to/from driver allocated buffer, otherwise we use client provided buffer
   BOOL                 fDMATransferCancelled;  // if TRUE, the DMA transfer is being cancelled
   DWORD                dwClientBufferSize;
   PVOID                pClientBuffer;
   PDWORD               pPFNs;                  // arra of pointers to lock pages of the data buffer
   DWORD                nPFNCount;              // size (in DWORDs) of buffer pointed by pPFNs
   DWORD                dwPageOffset;           // offset of the next block of data to be transferred
   DWORD                dwPFNIndex;             // index of the next page to be transferred
   DWORD                dwBytesRemaining;       // number of bytes remaining for transfer
#ifdef DEBUG
   BOOL                 fDMATransferInProgress;
#endif

   BOOL                 DriverShutdown;                // controller shutdown
   CRITICAL_SECTION     ControllerCriticalSection;     // controller critical section 
   BOOL                 SendInitClocks;                // flag to indicate that we need to send the init clock
   WCHAR                RegPath[256];                  // reg path  
   SDHSTATE             CurrentState;                  // current transfer state
   UCHAR                RcvBuffer[MMC_RXFIFO_SIZE];    // receive buffer
   UCHAR                XmitBuffer[MMC_TXFIFO_SIZE];   // xmit buffer
   BOOL                 fSDIOEnabled;                  // SDIO interrupts enabled
   BOOL                 fSDIOInterruptPending;         // indicates that and SDIO interupt has occured
   BOOL                 f4BitMode;                     // indicates that 4 bit data transfer mode is enabled
   BOOL                 fClockAlwaysOn;                // indicates that MMC clock should always remain ON
   BOOL                 fClockOnIfInterruptsEnabled;   // indicates that clock should remain on if SDIO interrupts are enabled
   BOOL                 DevicePresent;                 // device is present in the slot

   DWORD                dwSDClockFrequency;            // current SD clock frequency (Hz)
   DWORD                dwMaximumSDClockFrequency;     // maximum SD clock frequency (Hz)

   CRITICAL_SECTION     intrRegCriticalSection;        // imask register critical section

}SDH_HARDWARE_CONTEXT, *PSDH_HARDWARE_CONTEXT;

#define SetCurrentState(pHC, d) \
{\
    ((pHC)->CurrentState = (d)); \
}

#define ACQUIRE_LOCK(pHC) EnterCriticalSection(&(pHC)->ControllerCriticalSection)
#define RELEASE_LOCK(pHC) LeaveCriticalSection(&(pHC)->ControllerCriticalSection)

    // prototypes for handlers
BOOLEAN SDHCancelIoHandler(PSDCARD_HC_CONTEXT pHCContext,DWORD Slot, PSD_BUS_REQUEST pRequest);
SD_API_STATUS SDHBusRequestHandler(PSDCARD_HC_CONTEXT pHCContext,DWORD Slot, PSD_BUS_REQUEST pRequest);
SD_API_STATUS SDHSlotOptionHandler(PSDCARD_HC_CONTEXT    pHCContext,
                                     DWORD                 SlotNumber, 
                                     SD_SLOT_OPTION_CODE   Option, 
                                     PVOID                 pData,
                                     ULONG                 OptionSize);

    // other prototypes
SD_API_STATUS SDDeinitialize(PSDCARD_HC_CONTEXT pHCContext);
SD_API_STATUS SDInitialize(PSDCARD_HC_CONTEXT pHCContext);

#define SDH_INTERRUPT_ZONE    SDCARD_ZONE_0
#define SDH_SEND_ZONE         SDCARD_ZONE_1
#define SDH_RESPONSE_ZONE     SDCARD_ZONE_2
#define SDH_RECEIVE_ZONE      SDCARD_ZONE_3
#define SDH_CLOCK_ZONE        SDCARD_ZONE_4
#define SDH_TRANSMIT_ZONE     SDCARD_ZONE_5
#define SDH_SDBUS_INTERACTION_ZONE     SDCARD_ZONE_7

#define SDH_INTERRUPT_ZONE_ON ZONE_ENABLE_0
#define SDH_SEND_ZONE_ON      ZONE_ENABLE_1
#define SDH_RESPONSE_ZONE_ON  ZONE_ENABLE_2
#define SDH_RECEIVE_ZONE_ON   ZONE_ENABLE_3
#define SDH_CLOCK_ZONE_ON     ZONE_ENABLE_4
#define SDH_TRANSMIT_ZONE_ON  ZONE_ENABLE_5
#define SDH_SDBUS_INTERACTION_ZONE_ON  ZONE_ENABLE_7

#define SDH_CARD_CONTROLLER_PRIORITY 100
#define SDH_DEFAULT_RESPONSE_TIMEOUT_CLOCKS 64
#define SDH_DEFAULT_DATA_TIMEOUT_CLOCKS 0xFFFF

#define SDH_RESPONSE_FIFO_DEPTH              8  // 
      
#define SDH_MAX_BLOCK_SIZE           1023
#define SDH_MIN_BLOCK_SIZE           32

void  ProcessCardInsertion(void *pContext);
void  ProcessCardRemoval(void *pContext);
BOOL  DriverShutdown(void *pContext);
BOOL LoadRegistrySettings( HKEY hKeyDevice, PSDH_HARDWARE_CONTEXT pController );

    // platform specific functions
BOOL  InitializeHardware( HANDLE hBusAccessHandle );
void  UnInitializeHardware();

BOOL LoadPlatformRegistrySettings( HKEY hKeyDevice );

void  MMCPowerControl( BOOL fPowerOn );

BOOL  IsCardWriteProtected();
BOOL  IsCardPresent();
BOOL  SetupCardDetectIST(void *pContext);
void  CleanupCardDetectIST();
void  SimulateCardInsertion();

#endif

// DO NOT REMOVE --- END EXTERNALLY DEVELOPED SOURCE CODE ID --- DO NOT REMOVE