xllp_gpio.h

Windows CE 6.0 BSP for VOIPAC Board (PXA270) Version 2b.

/* Pin  113  alternate functions */
#define XLLP_GPIO_AF_BIT_I2S_SYSCLK			(XLLP_BIT_2)
#define XLLP_GPIO_AF_BIT_I2S_SYSCLK_MASK	(0x3u  << 2)
#define XLLP_GPIO_AF_BIT_AC97_nRESET		(0x2u  << 2)
#define XLLP_GPIO_AF_BIT_AC97_nRESET_MASK	(0x3u  << 2)

/* Pin  114  alternate functions */
#define XLLP_GPIO_AF_BIT_UVS0				(0x2u  << 4)
#define XLLP_GPIO_AF_BIT_UVS0_MASK			(0x3u  << 4)

/* Pin  114  alternate functions */
#define XLLP_GPIO_AF_BIT_CIF_DD1			(XLLP_BIT_4)
#define XLLP_GPIO_AF_BIT_CIF_DD1_MASK		(0x3u  << 4)

/* Pin  115  alternate functions */
#define XLLP_GPIO_AF_BIT_U_EN				(XLLP_BIT_6)
#define XLLP_GPIO_AF_BIT_U_EN_MASK			(0x3u  << 6)

/* Pin  115  alternate functions */
#define XLLP_GPIO_AF_BIT_CIF_DD3			(0x2u  << 6)
#define XLLP_GPIO_AF_BIT_CIF_DD3_MASK		(0x3u  << 6)

/* Pin  116  alternate functions */
#define XLLP_GPIO_AF_BIT_U_DET				(0x3u  << 8)
#define XLLP_GPIO_AF_BIT_U_DET_MASK			(0x3u  << 8)

/* Pin  116  alternate functions */
#define XLLP_GPIO_AF_BIT_CIF_DD2			(XLLP_BIT_8)
#define XLLP_GPIO_AF_BIT_CIF_DD2_MASK		(0x3u  << 8)

/* Pin  117  alternate functions */
#define XLLP_GPIO_AF_BIT_SCL				(XLLP_BIT_10)
#define XLLP_GPIO_AF_BIT_SCL_MASK			(0x3u  << 10)

/* Pin  118  alternate functions */
#define XLLP_GPIO_AF_BIT_SDA				(XLLP_BIT_12)
#define XLLP_GPIO_AF_BIT_SDA_MASK			(0x3u  << 12)

/* Pin  119  alternate functions */
#define XLLP_GPIO_AF_BIT_USBHPWR2			(XLLP_BIT_14)
#define XLLP_GPIO_AF_BIT_USBHPWR2_MASK		(0x3u  << 14)

/* Pin  120  alternate functions */
#define XLLP_GPIO_AF_BIT_USBHPEN2			(0x2u  << 16)
#define XLLP_GPIO_AF_BIT_USBHPEN2_MASK		(0x3u  << 16)


/* END of alternate function values for each GPIO  -- in BIT-WISE */
/*=================================================================*/

/* GPIO Register Fields */

#define XLLP_GPIO_PIN_RESERVED_BITS  0xfe000000u
#define XLLP_GPIO_ALT_RESERVED_BITS  0xfffc0000u
#define XLLP_GPIO_ALT_FUNC_MASK      3u

/************************************************************************/
/* BEGIN of alternate function values for each GPIO*/
//
//      ~~~ALTERNATE FUNCTIONS~~~
//	

/* Pin  11  alternate functions */
#define XLLP_GPIO_AF_SSPRXD2			XLLP_GPIO_ALT_FN_2

/* Pin  12  alternate functions */
#define XLLP_GPIO_AF_CIF_DD7			XLLP_GPIO_ALT_FN_2

/* Pin  13  alternate functions */
#define XLLP_GPIO_AF_SSPTXD2			XLLP_GPIO_ALT_FN_1

/* Pin  14  alternate functions */
#define XLLP_GPIO_AF_L_VSYNC			XLLP_GPIO_ALT_FN_1

/* Pin  15  alternate functions */
#define XLLP_GPIO_AF_nCS1				XLLP_GPIO_ALT_FN_2

/* Pin  16  alternate functions */
#define XLLP_GPIO_AF_PWM_OUT0			XLLP_GPIO_ALT_FN_2

/* Pin  17  alternate functions */
#define XLLP_GPIO_AF_PWM_OUT1			XLLP_GPIO_ALT_FN_2

/* Pin  17  alternate functions */
#define XLLP_GPIO_AF_CIF_DD6			XLLP_GPIO_ALT_FN_2

/* Pin  18  alternate functions */
#define XLLP_GPIO_AF_RDY				XLLP_GPIO_ALT_FN_1

/* Pin  19  alternate functions */
#define XLLP_GPIO_AF_L_CS				XLLP_GPIO_ALT_FN_2

/* Pin  20  alternate functions */
#define XLLP_GPIO_AF_MBREQ				XLLP_GPIO_ALT_FN_2

/* Pin  21  alternate functions */
#define XLLP_GPIO_AF_MBGNT				XLLP_GPIO_ALT_FN_3

/* Pin  22  alternate functions */
#define XLLP_GPIO_AF_SSPCLK2			XLLP_GPIO_ALT_FN_3

/* Pin  23  alternate functions */
#define XLLP_GPIO_AF_CIF_MCLK			XLLP_GPIO_ALT_FN_1

/* Pin  24  alternate functions */
#define XLLP_GPIO_AF_CIF_FV				XLLP_GPIO_ALT_FN_1

/* Pin  25  alternate functions */
#define XLLP_GPIO_AF_CIF_LV				XLLP_GPIO_ALT_FN_1

/* Pin  26  alternate functions */
#define XLLP_GPIO_AF_CIF_PCLK			XLLP_GPIO_ALT_FN_2

/* Pin  27  alternate functions */
#define XLLP_GPIO_AF_CIF_DD0			XLLP_GPIO_ALT_FN_3

/* Pin  28  alternate functions */
#define XLLP_GPIO_AF_AC97_BITCLK		XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_I2SBITCLK_IN		XLLP_GPIO_ALT_FN_2
#define XLLP_GPIO_AF_I2SBITCLK_OUT		XLLP_GPIO_ALT_FN_1

/* Pin  29  alternate functions */
#define XLLP_GPIO_AF_AC97_SDATA_IN_0	XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_I2S_SDATA_IN		XLLP_GPIO_ALT_FN_2

/* Pin  30  alternate functions */
#define XLLP_GPIO_AF_I2S_SDATA_OUT		XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_AC97_SDATA_OUT		XLLP_GPIO_ALT_FN_2

/* Pin  31  alternate functions */
#define XLLP_GPIO_AF_I2S_SYNC			XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_AC97_SYNC			XLLP_GPIO_ALT_FN_2

/* Pin  32  alternate functions */
#define XLLP_GPIO_AF_MSSCLK				XLLP_GPIO_ALT_FN_1  
#define XLLP_GPIO_AF_MMCLK				XLLP_GPIO_ALT_FN_2 

/* Pin  33  alternate functions */
#define XLLP_GPIO_AF_nCS5				XLLP_GPIO_ALT_FN_2

/* Pin  34  alternate functions */
#define XLLP_GPIO_AF_FFRXD				XLLP_GPIO_ALT_FN_1

/* Pin  34  alternate functions */
#define XLLP_GPIO_AF_USB_P2_2			XLLP_GPIO_ALT_FN_1

/* Pin  35  alternate functions */
#define XLLP_GPIO_AF_FFCTS				XLLP_GPIO_ALT_FN_1

/* Pin  35  alternate functions */
#define XLLP_GPIO_AF_USB_P2_1			XLLP_GPIO_ALT_FN_1

/* Pin  36  alternate functions */
#define XLLP_GPIO_AF_FFDCD				XLLP_GPIO_ALT_FN_1

/* Pin  36  alternate functions */
#define XLLP_GPIO_AF_USB_P2_4			XLLP_GPIO_ALT_FN_1

/* Pin  36  alternate functions */
#define XLLP_GPIO_AF_SSPSCLK2			XLLP_GPIO_ALT_FN_2

/* Pin  37  alternate functions */
#define XLLP_GPIO_AF_FFDSR				XLLP_GPIO_ALT_FN_1

/* Pin  37  alternate functions */
#define XLLP_GPIO_AF_SSPSFRM2			XLLP_GPIO_ALT_FN_2

/* Pin  38  alternate functions */
#define XLLP_GPIO_AF_FFRI				XLLP_GPIO_ALT_FN_1

/* Pin  38  alternate functions */
#define XLLP_GPIO_AF_USB_P2_3			XLLP_GPIO_ALT_FN_3

/* Pin  38  alternate functions */
#define XLLP_GPIO_AF_SSPTXD2			XLLP_GPIO_ALT_FN_1

/* Pin  39  alternate functions */
#define XLLP_GPIO_AF_FFTXD				XLLP_GPIO_ALT_FN_2

/* Pin  39  alternate functions */
#define XLLP_GPIO_AF_USB_P2_6			XLLP_GPIO_ALT_FN_1

/* Pin  40  alternate functions */
#define XLLP_GPIO_AF_FFDTR				XLLP_GPIO_ALT_FN_2

/* Pin  40  alternate functions */
#define XLLP_GPIO_AF_USB_P2_5			XLLP_GPIO_ALT_FN_3

/* Pin  41  alternate functions */
#define XLLP_GPIO_AF_FFRTS				XLLP_GPIO_ALT_FN_2

/* Pin  42  alternate functions */
#define XLLP_GPIO_AF_BTRXD				XLLP_GPIO_ALT_FN_1

/* Pin  43  alternate functions */
#define XLLP_GPIO_AF_BTTXD				XLLP_GPIO_ALT_FN_2

/* Pin  44  alternate functions */
#define XLLP_GPIO_AF_BTCTS				XLLP_GPIO_ALT_FN_1

/* Pin  45  alternate functions */
#define XLLP_GPIO_AF_BTRTS				XLLP_GPIO_ALT_FN_2

/* Pin  46  alternate functions */
#define XLLP_GPIO_AF_ICP_RXD			XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_STD_RXD			XLLP_GPIO_ALT_FN_2

/* Pin  47  alternate functions */
#define XLLP_GPIO_AF_ICP_TXD			XLLP_GPIO_ALT_FN_2
#define XLLP_GPIO_AF_STD_TXD			XLLP_GPIO_ALT_FN_1

/* Pin  48  alternate functions */
#define XLLP_GPIO_AF_BB_OB_DAT1			XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_PCMCIA_nPOE		XLLP_GPIO_ALT_FN_2

/* Pin  49  alternate functions */
#define XLLP_GPIO_AF_nPWE				XLLP_GPIO_ALT_FN_2

/* Pin  50  alternate functions */
#define XLLP_GPIO_AF_BB_OB_DAT2			XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_PCMCIA_nPIOR		XLLP_GPIO_ALT_FN_2

/* Pin  51  alternate functions */
#define XLLP_GPIO_AF_BB_OB_DAT3			XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_PCMCIA_nPIOW		XLLP_GPIO_ALT_FN_2

/* Pin  52  alternate functions */
#define XLLP_GPIO_AF_BB_OB_CLK			XLLP_GPIO_ALT_FN_1

/* Pin  52  alternate functions */
#define XLLP_GPIO_AF_SSPSCLK3			XLLP_GPIO_ALT_FN_2

/* Pin  53  alternate functions */
#define XLLP_GPIO_AF_BB_OB_STB			XLLP_GPIO_ALT_FN_1

/* Pin  54  alternate functions */
#define XLLP_GPIO_AF_BB_OB_WAIT			XLLP_GPIO_ALT_FN_2
#define XLLP_GPIO_AF_PCMCIA_nPCE2		XLLP_GPIO_ALT_FN_2

/* Pin  55  alternate functions */
#define XLLP_GPIO_AF_BB_IB_DAT1			XLLP_GPIO_ALT_FN_2
#define XLLP_GPIO_AF_PCMCIA_nPREG		XLLP_GPIO_ALT_FN_2

/* Pin  56  alternate functions */
#define XLLP_GPIO_AF_PCMCIA_nPWAIT		XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_BB_IB_DAT2			XLLP_GPIO_ALT_FN_2

/* Pin  57  alternate functions */
#define XLLP_GPIO_AF_PCMCIA_nIOIS16		XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_BB_IB_DAT3			XLLP_GPIO_ALT_FN_2

/* Pin  58  alternate functions */
#define XLLP_GPIO_AF_L_DD0				XLLP_GPIO_ALT_FN_2

/* Pin  59  alternate functions */
#define XLLP_GPIO_AF_L_DD1				XLLP_GPIO_ALT_FN_2

/* Pin  60  alternate functions */
#define XLLP_GPIO_AF_L_DD2				XLLP_GPIO_ALT_FN_2

/* Pin  61  alternate functions */
#define XLLP_GPIO_AF_L_DD3				XLLP_GPIO_ALT_FN_2

/* Pin  62  alternate functions */
#define XLLP_GPIO_AF_L_DD4				XLLP_GPIO_ALT_FN_2

/* Pin  63  alternate functions */
#define XLLP_GPIO_AF_L_DD5				XLLP_GPIO_ALT_FN_2

/* Pin  64  alternate functions */
#define XLLP_GPIO_AF_L_DD6				XLLP_GPIO_ALT_FN_2

/* Pin  65  alternate functions */
#define XLLP_GPIO_AF_L_DD7				XLLP_GPIO_ALT_FN_2

/* Pin  66  alternate functions */
#define XLLP_GPIO_AF_L_DD8				XLLP_GPIO_ALT_FN_2

/* Pin  67  alternate functions */
#define XLLP_GPIO_AF_L_DD9				XLLP_GPIO_ALT_FN_2

/* Pin  68  alternate functions */
#define XLLP_GPIO_AF_L_DD10				XLLP_GPIO_ALT_FN_2

/* Pin  69  alternate functions */
#define XLLP_GPIO_AF_L_DD11				XLLP_GPIO_ALT_FN_2

/* Pin  70  alternate functions */
#define XLLP_GPIO_AF_L_DD12				XLLP_GPIO_ALT_FN_2

/* Pin  71  alternate functions */
#define XLLP_GPIO_AF_L_DD13				XLLP_GPIO_ALT_FN_2

/* Pin  72  alternate functions */
#define XLLP_GPIO_AF_L_DD14				XLLP_GPIO_ALT_FN_2

/* Pin  73  alternate functions */
#define XLLP_GPIO_AF_L_DD15				XLLP_GPIO_ALT_FN_2

/* Pin  74  alternate functions */
#define XLLP_GPIO_AF_L_FCLK_RD			XLLP_GPIO_ALT_FN_2

/* Pin  75  alternate functions */
#define XLLP_GPIO_AF_L_LCLK_A0			XLLP_GPIO_ALT_FN_2

/* Pin  76  alternate functions */
#define XLLP_GPIO_AF_L_PCLK_WR			XLLP_GPIO_ALT_FN_2

/* Pin  77  alternate functions */
#define XLLP_GPIO_AF_L_BIAS				XLLP_GPIO_ALT_FN_2

/* Pin  78  alternate functions */
#define XLLP_GPIO_AF_nCS2				XLLP_GPIO_ALT_FN_2

/* Pin  79  alternate functions */
#define XLLP_GPIO_AF_PCMCIA_PSKTSEL		XLLP_GPIO_ALT_FN_1