xllp_gpio.h

Windows CE 6.0 BSP for VOIPAC Board (PXA270) Version 2b.

#define XLLP_GPIO_BIT_ICP_TXD				( XLLP_BIT_15 )
#define XLLP_GPIO_BIT_STD_TXD				( XLLP_BIT_15 )
#define XLLP_GPIO_BIT_BB_OB_DAT1			( XLLP_BIT_16 )
#define XLLP_GPIO_BIT_PCMCIA_nPOE			( XLLP_BIT_16 )
#define XLLP_GPIO_BIT_nPWE					( XLLP_BIT_17 )
#define XLLP_GPIO_BIT_BB_OB_DAT2			( XLLP_BIT_18 )
#define XLLP_GPIO_BIT_PCMCIA_nPIOR			( XLLP_BIT_18 )
#define XLLP_GPIO_BIT_BB_OB_DAT3			( XLLP_BIT_19 )
#define XLLP_GPIO_BIT_PCMCIA_nPIOW			( XLLP_BIT_19 )
#define XLLP_GPIO_BIT_BB_OB_CLK				( XLLP_BIT_20 )
#define XLLP_GPIO_BIT_BB_OB_STB				( XLLP_BIT_21 )
#define XLLP_GPIO_BIT_BB_OB_WAIT			( XLLP_BIT_22 )
#define XLLP_GPIO_BIT_PCMCIA_nPCE2			( XLLP_BIT_22 )
#define XLLP_GPIO_BIT_BB_IB_DAT1			( XLLP_BIT_23 )
#define XLLP_GPIO_BIT_PCMCIA_nPREG			( XLLP_BIT_23 )
#define XLLP_GPIO_BIT_BB_IB_DAT2			( XLLP_BIT_24 )
#define XLLP_GPIO_BIT_PCMCIA_nPWAIT			( XLLP_BIT_24 )
#define XLLP_GPIO_BIT_BB_IB_DAT3			( XLLP_BIT_25 )
#define XLLP_GPIO_BIT_PCMCIA_nIOIS16		( XLLP_BIT_25 )
#define XLLP_GPIO_BIT_L_DD0					( XLLP_BIT_26 )
#define XLLP_GPIO_BIT_L_DD1					( XLLP_BIT_27 )
#define XLLP_GPIO_BIT_L_DD2					( XLLP_BIT_28 )
#define XLLP_GPIO_BIT_L_DD3					( XLLP_BIT_29 )
#define XLLP_GPIO_BIT_L_DD4					( XLLP_BIT_30 )
#define XLLP_GPIO_BIT_L_DD5					( XLLP_BIT_31 )

/* GPIO Pin Bank 2 */
#define XLLP_GPIO_BIT_L_DD6					( XLLP_BIT_0 )
#define XLLP_GPIO_BIT_L_DD7					( XLLP_BIT_1 )
#define XLLP_GPIO_BIT_L_DD8					( XLLP_BIT_2 )
#define XLLP_GPIO_BIT_L_DD9					( XLLP_BIT_3 )
#define XLLP_GPIO_BIT_L_DD10				( XLLP_BIT_4 )
#define XLLP_GPIO_BIT_L_DD11				( XLLP_BIT_5 )
#define XLLP_GPIO_BIT_L_DD12				( XLLP_BIT_6 ) 
#define XLLP_GPIO_BIT_L_DD13				( XLLP_BIT_7 )
#define XLLP_GPIO_BIT_L_DD14				( XLLP_BIT_8 )
#define XLLP_GPIO_BIT_L_DD15				( XLLP_BIT_9 )
#define XLLP_GPIO_BIT_L_FCLK				( XLLP_BIT_10 )
#define XLLP_GPIO_BIT_L_LCLK				( XLLP_BIT_11 )
#define XLLP_GPIO_BIT_L_PCLK				( XLLP_BIT_12 )
#define XLLP_GPIO_BIT_L_BIAS				( XLLP_BIT_13 )
#define XLLP_GPIO_BIT_nCS2					( XLLP_BIT_14 )
#define XLLP_GPIO_BIT_PCMCIA_PSKTSEL		( XLLP_BIT_15 )
#define XLLP_GPIO_BIT_nCS4					( XLLP_BIT_16 )
#define XLLP_GPIO_BIT_BB_OB_DAT0			( XLLP_BIT_17 )
#define XLLP_GPIO_BIT_BB_IB_DAT0			( XLLP_BIT_18 )
#define XLLP_GPIO_BIT_BB_IB_CLK				( XLLP_BIT_19 )
#define XLLP_GPIO_BIT_BB_IB_STB				( XLLP_BIT_20 )
#define XLLP_GPIO_BIT_BB_IB_WAIT			( XLLP_BIT_21 )
#define XLLP_GPIO_BIT_PCMCIA_nPCE1			( XLLP_BIT_21 )
#define XLLP_GPIO_BIT_L_DD16				( XLLP_BIT_22 )
#define XLLP_GPIO_BIT_PCMCIA_nPCE1_1        ( XLLP_BIT_22 )
#define XLLP_GPIO_BIT_L_DD17				( XLLP_BIT_23 )
#define XLLP_GPIO_BIT_PCMCIA_nPCE1_2        ( XLLP_BIT_23 )
#define XLLP_GPIO_BIT_USBHPWR0				( XLLP_BIT_24 )
#define XLLP_GPIO_BIT_SSPFRM2               ( XLLP_BIT_24 )
#define XLLP_GPIO_BIT_USBHPEN0				( XLLP_BIT_25 )
#define XLLP_GPIO_BIT_URST					( XLLP_BIT_26 )
#define XLLP_GPIO_BIT_CIF_DD4               ( XLLP_BIT_26 )
#define XLLP_GPIO_BIT_UCLK					( XLLP_BIT_27 )
#define XLLP_GPIO_BIT_CIF_DD5               ( XLLP_BIT_27 )
#define XLLP_GPIO_BIT_MMDAT0				( XLLP_BIT_28 )
#define XLLP_GPIO_BIT_MSBS					( XLLP_BIT_28 )
#define XLLP_GPIO_BIT_KP_DKIN0				( XLLP_BIT_29 )
#define XLLP_GPIO_BIT_KP_DKIN1				( XLLP_BIT_30 )
#define XLLP_GPIO_BIT_KP_MKIN6              ( XLLP_BIT_31 )


/* GPIO Pin Bank 3 */
#define XLLP_GPIO_BIT_KP_MKOUT6             ( XLLP_BIT_0 )
#define XLLP_GPIO_BIT_KP_MKIN3              ( XLLP_BIT_1 )
#define XLLP_GPIO_BIT_KP_MKIN4              ( XLLP_BIT_2 )
#define XLLP_GPIO_BIT_KP_MKIN5              ( XLLP_BIT_3 )
#define XLLP_GPIO_BIT_KP_MKIN0				( XLLP_BIT_4 )
#define XLLP_GPIO_BIT_KP_MKIN1				( XLLP_BIT_5 )
#define XLLP_GPIO_BIT_KP_MKIN2				( XLLP_BIT_6 )
#define XLLP_GPIO_BIT_KP_MKOUT0				( XLLP_BIT_7 )
#define XLLP_GPIO_BIT_KP_MKOUT1				( XLLP_BIT_8 )
#define XLLP_GPIO_BIT_KP_MKOUT2				( XLLP_BIT_9 )
#define XLLP_GPIO_BIT_KP_MKOUT3				( XLLP_BIT_10 )
#define XLLP_GPIO_BIT_KP_MKOUT4				( XLLP_BIT_11 )
#define XLLP_GPIO_BIT_KP_MKOUT5				( XLLP_BIT_12 )
#define XLLP_GPIO_BIT_MMDAT1				( XLLP_BIT_13 )
#define XLLP_GPIO_BIT_MSSDIO				( XLLP_BIT_13 )
#define XLLP_GPIO_BIT_MMDAT2				( XLLP_BIT_14 )
#define XLLP_GPIO_BIT_MMDAT3				( XLLP_BIT_15 )
#define XLLP_GPIO_BIT_MMCMD					( XLLP_BIT_16 )
#define XLLP_GPIO_BIT_MSINS					( XLLP_BIT_16 )
#define XLLP_GPIO_BIT_AC97_RESET_n			( XLLP_BIT_17 )
#define XLLP_GPIO_BIT_I2S_SYSCLK			( XLLP_BIT_17 )
#define XLLP_GPIO_BIT_UVS0					( XLLP_BIT_18 )
#define XLLP_GPIO_BIT_CIF_DD1               ( XLLP_BIT_18 )
#define XLLP_GPIO_BIT_U_EN                  ( XLLP_BIT_19 )
#define XLLP_GPIO_BIT_CIF_DD3               ( XLLP_BIT_19 )
#define XLLP_GPIO_BIT_U_DET                 ( XLLP_BIT_20 )
#define XLLP_GPIO_BIT_CIF_DD2               ( XLLP_BIT_20 )
#define XLLP_GPIO_BIT_SCL					( XLLP_BIT_21 )
#define XLLP_GPIO_BIT_SDA					( XLLP_BIT_22 )

/******* End of GPIO Pin Bit Position ********/

/*=================================================================*/
/* BEGIN of alternate function values for each GPIO  -- in BIT-WISE */
//
//
/* Pin  11  alternate functions */
#define XLLP_GPIO_AF_BIT_SSPRXD2			(0x2u  << 22)
#define XLLP_GPIO_AF_BIT_SSPRXD2_MASK		(0x3u  << 22)

/* Pin  12  alternate functions */
#define XLLP_GPIO_AF_BIT_CIF_DD7			(0x2u  << 24)
#define XLLP_GPIO_AF_BIT_CIF_DD7_MASK		(0x3u  << 24)

/* Pin  13  alternate functions */
#define XLLP_GPIO_AF_BIT_SSPTXD2			(XLLP_BIT_26)
#define XLLP_GPIO_AF_BIT_SSPTXD2_MASK		(0x3u  << 26)

/* Pin  14  alternate functions */
#define XLLP_GPIO_AF_BIT_L_VSYNC			(XLLP_BIT_28)
#define XLLP_GPIO_AF_BIT_L_VSYNC_MASK		(0x3u  << 28)

/* Pin  15  alternate functions */
#define XLLP_GPIO_AF_BIT_nCS1				(0x2u  << 30)
#define XLLP_GPIO_AF_BIT_nCS1_MASK			(0x3u  << 30)

/* Pin  16  alternate functions */
#define XLLP_GPIO_AF_BIT_PWM_OUT0			(0x2u  << 0)
#define XLLP_GPIO_AF_BIT_PWM_OUT0_MASK		(0x3u  << 0)

/* Pin  17  alternate functions */
#define XLLP_GPIO_AF_BIT_PWM_OUT1			(0x2u  << 2)
#define XLLP_GPIO_AF_BIT_PWM_OUT1_MASK		(0x3u  << 2)

/* Pin  17  alternate functions */
#define XLLP_GPIO_AF_BIT_CIF_DD6			(0x2u  << 2)
#define XLLP_GPIO_AF_BIT_CIF_DD6_MASK		(0x3u  << 2)

/* Pin  18  alternate functions */
#define XLLP_GPIO_AF_BIT_RDY				(XLLP_BIT_4)
#define XLLP_GPIO_AF_BIT_RDY_MASK			(0x3u  << 4)

/* Pin  19  alternate functions */
#define XLLP_GPIO_AF_BIT_L_CS				(0x2u  << 6)
#define XLLP_GPIO_AF_BIT_L_CS_MASK			(0x3u  << 6)

/* Pin  20  alternate functions */
#define XLLP_GPIO_AF_BIT_MBREQ				(0x2u  << 8)
#define XLLP_GPIO_AF_BIT_MBREQ_MASK			(0x3u  << 8)

/* Pin  21  alternate functions */
#define XLLP_GPIO_AF_BIT_MBGNT				(0x3u  << 10)
#define XLLP_GPIO_AF_BIT_MBGNT_MASK			(0x3u  << 10)

/* Pin  22  alternate functions */
#define XLLP_GPIO_AF_BIT_SSPCLK2			(0x3u  << 12)
#define XLLP_GPIO_AF_BIT_SSPCLK2_MASK		(0x3u  << 12)

/* Pin  23  alternate functions */
#define XLLP_GPIO_AF_BIT_CIF_MCLK			(XLLP_BIT_14)
#define XLLP_GPIO_AF_BIT_CIF_MCLK_MASK		(0x3u  << 14)

/* Pin  24  alternate functions */
#define XLLP_GPIO_AF_BIT_CIF_FV				(XLLP_BIT_16)
#define XLLP_GPIO_AF_BIT_CIF_FV_MASK		(0x3u  << 16)

/* Pin  25  alternate functions */
#define XLLP_GPIO_AF_BIT_CIF_LV				(XLLP_BIT_18)
#define XLLP_GPIO_AF_BIT_CIF_LV_MASK		(0x3u  << 18)

/* Pin  26  alternate functions */
#define XLLP_GPIO_AF_BIT_CIF_PCLK			(0x2u  << 20)
#define XLLP_GPIO_AF_BIT_CIF_PCLK_MASK		(0x3u  << 20)

/* Pin  27  alternate functions */
#define XLLP_GPIO_AF_BIT_CIF_DD0			(0x3u  << 22)
#define XLLP_GPIO_AF_BIT_CIF_DD0_MASK		(0x3u  << 22)

/* Pin  28  alternate functions */
#define XLLP_GPIO_AF_BIT_AC97_BITCLK		(XLLP_BIT_24)
#define XLLP_GPIO_AF_BIT_AC97_BITCLK_MASK	(0x3u  << 24)
#define XLLP_GPIO_AF_BIT_I2SBITCLK_IN		(0x2u  << 24)
#define XLLP_GPIO_AF_BIT_I2SBITCLK_IN_MASK	(0x3u  << 24)
#define XLLP_GPIO_AF_BIT_I2SBITCLK_OUT		(XLLP_BIT_24)
#define XLLP_GPIO_AF_BIT_I2SBITCLK_OUT_MASK	(0x3u  << 24)

/* Pin  29  alternate functions */
#define XLLP_GPIO_AF_BIT_AC97_SDATA_IN_0		(XLLP_BIT_26)
#define XLLP_GPIO_AF_BIT_AC97_SDATA_IN_0_MASK	(0x3u  << 26)
#define XLLP_GPIO_AF_BIT_I2S_SDATA_IN			(0x2u  << 26)
#define XLLP_GPIO_AF_BIT_I2S_SDATA_IN_MASK		(0x3u  << 26)
#define XLLP_GPIO_AF_BIT_SSP2_SSPRXD2           (0x1u << 26)
#define XLLP_GPIO_AF_BIT_SSP2_SSPRXD2_MASK      (0x3u << 26)

/* Pin  30  alternate functions */
#define XLLP_GPIO_AF_BIT_I2S_SDATA_OUT			(XLLP_BIT_28)
#define XLLP_GPIO_AF_BIT_I2S_SDATA_OUT_MASK		(0x3u  << 28)
#define XLLP_GPIO_AF_BIT_AC97_SDATA_OUT			(0x2u  << 28)
#define XLLP_GPIO_AF_BIT_AC97_SDATA_OUT_MASK	(0x3u  << 28)

/* Pin  31  alternate functions */
#define XLLP_GPIO_AF_BIT_I2S_SYNC			(XLLP_BIT_30)
#define XLLP_GPIO_AF_BIT_I2S_SYNC_MASK		(0x3u  << 30)
#define XLLP_GPIO_AF_BIT_AC97_SYNC			(0x2u  << 30)
#define XLLP_GPIO_AF_BIT_AC97_SYNC_MASK		(0x3u  << 30)

/* Pin  32  alternate functions */
#define XLLP_GPIO_AF_BIT_MSSCLK				(XLLP_BIT_0)
#define XLLP_GPIO_AF_BIT_MSSCLK_MASK		(0x3u  << 0)		
#define XLLP_GPIO_AF_BIT_MMCLK				(0x2u  << 0)
#define XLLP_GPIO_AF_BIT_MMCLK_MASK			(0x3u  << 0)

/* Pin  33  alternate functions */
#define XLLP_GPIO_AF_BIT_nCS5				(0x2u  << 2)
#define XLLP_GPIO_AF_BIT_nCS5_MASK			(0x3u  << 2)

/* Pin  34  alternate functions */
#define XLLP_GPIO_AF_BIT_FFRXD				(XLLP_BIT_4)
#define XLLP_GPIO_AF_BIT_FFRXD_MASK			(0x3u  << 4)

/* Pin  34  alternate functions */
#define XLLP_GPIO_AF_BIT_USB_P2_2			(XLLP_BIT_4)
#define XLLP_GPIO_AF_BIT_USB_P2_2_MASK		(0x3u  << 4)

/* Pin  35  alternate functions */
#define XLLP_GPIO_AF_BIT_FFCTS				(XLLP_BIT_6)
#define XLLP_GPIO_AF_BIT_FFCTS_MASK			(0x3u  << 6)

/* Pin  35  alternate functions */
#define XLLP_GPIO_AF_BIT_USB_P2_1			(0x2u  << 6)
#define XLLP_GPIO_AF_BIT_USB_P2_1_MASK		(0x3u  << 6)

/* Pin  36  alternate functions */
#define XLLP_GPIO_AF_BIT_FFDCD				(XLLP_BIT_8)
#define XLLP_GPIO_AF_BIT_FFDCD_MASK			(0x3u  << 8)

/* Pin  36  alternate functions */
#define XLLP_GPIO_AF_BIT_USB_P2_4			(XLLP_BIT_8)
#define XLLP_GPIO_AF_BIT_USB_P2_4_MASK		(0x3u  << 8)

/* Pin  36  alternate functions */
#define XLLP_GPIO_AF_BIT_SSPSCLK2			(0x2u  << 8)
#define XLLP_GPIO_AF_BIT_SSPSCLK2_MASK		(0x3u  << 8)

/* Pin  37  alternate functions */
#define XLLP_GPIO_AF_BIT_FFDSR				(XLLP_BIT_10)
#define XLLP_GPIO_AF_BIT_FFDSR_MASK			(0x3u  << 10)

/* Pin  37  alternate functions */
#define XLLP_GPIO_AF_BIT_SSPSFRM2			(0x2u  << 10)
#define XLLP_GPIO_AF_BIT_SSPSFRM2_MASK		(0x3u  << 10)

/* Pin  37  alternate functions */
#define XLLP_GPIO_AF_BIT_USB_P2_8			(0x1u  << 10)
#define XLLP_GPIO_AF_BIT_USB_P2_8_MASK		(0x3u  << 10)

/* Pin  38  alternate functions */
#define XLLP_GPIO_AF_BIT_FFRI				(XLLP_BIT_12)
#define XLLP_GPIO_AF_BIT_FFRI_MASK			(0x3u  << 12)

/* Pin  38  alternate functions */
#define XLLP_GPIO_AF_BIT_USB_P2_3			(0x3u  << 12)
#define XLLP_GPIO_AF_BIT_USB_P2_3_MASK		(0x3u  << 12)

/* Pin  39  alternate functions */
#define XLLP_GPIO_AF_BIT_FFTXD				(0x2u  << 14)
#define XLLP_GPIO_AF_BIT_FFTXD_MASK			(0x3u  << 14)

/* Pin  39  alternate functions */
#define XLLP_GPIO_AF_BIT_USB_P2_6			(XLLP_BIT_14)
#define XLLP_GPIO_AF_BIT_USB_P2_6_MASK		(0x3u  << 14)

/* Pin  40  alternate functions */
#define XLLP_GPIO_AF_BIT_FFDTR				(0x2u  << 16)
#define XLLP_GPIO_AF_BIT_FFDTR_MASK			(0x3u  << 16)

/* Pin  40  alternate functions */
#define XLLP_GPIO_AF_BIT_USB_P2_5			(0x3u  << 16)
#define XLLP_GPIO_AF_BIT_USB_P2_5_MASK		(0x3u  << 16)

/* Pin  41  alternate functions */
#define XLLP_GPIO_AF_BIT_FFRTS				(0x2u  << 18)
#define XLLP_GPIO_AF_BIT_FFRTS_MASK			(0x3u  << 18)

#define XLLP_GPIO_AF_BIT_USB_P2_7			(0x2u  << 18)
#define XLLP_GPIO_AF_BIT_USB_P2_7_MASK		(0x3u  << 18)

/* Pin  42  alternate functions */
#define XLLP_GPIO_AF_BIT_BTRXD				(XLLP_BIT_20)
#define XLLP_GPIO_AF_BIT_BTRXD_MASK			(0x3u  << 20)

/* Pin  43  alternate functions */
#define XLLP_GPIO_AF_BIT_BTTXD				(0x2u  << 22)
#define XLLP_GPIO_AF_BIT_BTTXD_MASK			(0x3u  << 22)

/* Pin  44  alternate functions */
#define XLLP_GPIO_AF_BIT_BTCTS				(XLLP_BIT_24)
#define XLLP_GPIO_AF_BIT_BTCTS_MASK			(0x3u  << 24)

/* Pin  45  alternate functions */
#define XLLP_GPIO_AF_BIT_BTRTS				(0x2u  << 26)
#define XLLP_GPIO_AF_BIT_BTRTS_MASK			(0x3u  << 26)

/* Pin  46  alternate functions */
#define XLLP_GPIO_AF_BIT_ICP_RXD			(XLLP_BIT_28)
#define XLLP_GPIO_AF_BIT_ICP_RXD_MASK		(0x3u  << 28)
#define XLLP_GPIO_AF_BIT_STD_RXD			(0x2u  << 28)
#define XLLP_GPIO_AF_BIT_STD_RXD_MASK		(0x3u  << 28)

/* Pin  47  alternate functions */
#define XLLP_GPIO_AF_BIT_ICP_TXD			(0x2u  << 30)
#define XLLP_GPIO_AF_BIT_ICP_TXD_MASK		(0x3u  << 30)
#define XLLP_GPIO_AF_BIT_STD_TXD			(XLLP_BIT_30)
#define XLLP_GPIO_AF_BIT_STD_TXD_MASK		(0x3u  << 30)

/* Pin  48  alternate functions */
#define XLLP_GPIO_AF_BIT_BB_OB_DAT1			(XLLP_BIT_0)